diff mbox series

[v3,1/2] mips: add <asm-generic/io.h> including

Message ID 20230303102817.212148-2-bhe@redhat.com
State New
Headers
Series arch/*/io.h: remove ioremap_uc in some architectures |

Commit Message

Baoquan He March 3, 2023, 10:28 a.m. UTC 
  With the adding, some default ioremap_xx methods defined in
asm-generic/io.h can be used. E.g the default ioremap_uc() returning
NULL.

Signed-off-by: Baoquan He <bhe@redhat.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Helge Deller <deller@gmx.de>
Cc: Serge Semin <fancer.lancer@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Huacai Chen <chenhuacai@kernel.org>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-mips@vger.kernel.org
---
 arch/mips/include/asm/io.h | 78 ++++++++++++++++++++++++++++++++++----
 1 file changed, 70 insertions(+), 8 deletions(-)

Comments

Arnd Bergmann March 3, 2023, 12:40 p.m. UTC | #1 
On Fri, Mar 3, 2023, at 11:28, Baoquan He wrote:
> With the adding, some default ioremap_xx methods defined in
> asm-generic/io.h can be used. E.g the default ioremap_uc() returning
> NULL.
>
> Signed-off-by: Baoquan He <bhe@redhat.com>
> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> Cc: Geert Uytterhoeven <geert@linux-m68k.org>
> Cc: Helge Deller <deller@gmx.de>
> Cc: Serge Semin <fancer.lancer@gmail.com>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: Huacai Chen <chenhuacai@kernel.org>
> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Cc: linux-mips@vger.kernel.org

Reviewed-by: Arnd Bergmann <arnd@arndb.de>

I think this is all good. I had look at what cleanups we could do as
follow-ups:

> +#define phys_to_virt phys_to_virt
>  static inline void * phys_to_virt(unsigned long address)
>  {
>  	return __va(address);

This is the same as the asm-generic version, so the mips definition
is no longer needed.

> @@ -359,6 +360,27 @@ __BUILD_MEMORY_PFX(__raw_, q, u64, 0)
>  __BUILD_MEMORY_PFX(__mem_, q, u64, 0)
>  #endif
> 
> +#define readb readb
> +#define readw readw
> +#define readl readl
> +#define writeb writeb
> +#define writew writew
> +#define writel writel
> +
> +#ifdef CONFIG_64BIT
> +#define readq readq
> +#define writeq writeq
> +#define __raw_readq __raw_readq
> +#define __raw_writeq __raw_writeq
> +#endif
> +
> +#define __raw_readb __raw_readb
> +#define __raw_readw __raw_readw
> +#define __raw_readl __raw_readl
> +#define __raw_writeb __raw_writeb
> +#define __raw_writew __raw_writew
> +#define __raw_writel __raw_writel

The mips code defines the __raw variants with slightly different
semantics on both barriers and byteswap, which makes it impractical
to share any of the above.				

> +#define memset_io memset_io
>  static inline void memset_io(volatile void __iomem *addr, unsigned 
> char val, int count)
>  {
>  	memset((void __force *) addr, val, count);
>  }
> +#define memcpy_fromio memcpy_fromio
>  static inline void memcpy_fromio(void *dst, const volatile void 
> __iomem *src, int count)
>  {
>  	memcpy(dst, (void __force *) src, count);
>  }
> +#define memcpy_toio memcpy_toio

These are again the same as the generic version

    Arnd
Baoquan He March 6, 2023, 8:46 a.m. UTC | #2 
On 03/03/23 at 01:40pm, Arnd Bergmann wrote:
> On Fri, Mar 3, 2023, at 11:28, Baoquan He wrote:
> > With the adding, some default ioremap_xx methods defined in
> > asm-generic/io.h can be used. E.g the default ioremap_uc() returning
> > NULL.
> >
> > Signed-off-by: Baoquan He <bhe@redhat.com>
> > Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> > Cc: Geert Uytterhoeven <geert@linux-m68k.org>
> > Cc: Helge Deller <deller@gmx.de>
> > Cc: Serge Semin <fancer.lancer@gmail.com>
> > Cc: Florian Fainelli <f.fainelli@gmail.com>
> > Cc: Huacai Chen <chenhuacai@kernel.org>
> > Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > Cc: linux-mips@vger.kernel.org
> 
> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
> 
> I think this is all good. I had look at what cleanups we could do as
> follow-ups:

Thanks a lot for careful reviewing and great suggestions.

> 
> > +#define phys_to_virt phys_to_virt
> >  static inline void * phys_to_virt(unsigned long address)
> >  {
> >  	return __va(address);
> 
> This is the same as the asm-generic version, so the mips definition
> is no longer needed.

Agree, I can clean this up with a followup patch.

> 
> > @@ -359,6 +360,27 @@ __BUILD_MEMORY_PFX(__raw_, q, u64, 0)
> >  __BUILD_MEMORY_PFX(__mem_, q, u64, 0)
> >  #endif
> > 
> > +#define readb readb
> > +#define readw readw
> > +#define readl readl
> > +#define writeb writeb
> > +#define writew writew
> > +#define writel writel
> > +
> > +#ifdef CONFIG_64BIT
> > +#define readq readq
> > +#define writeq writeq
> > +#define __raw_readq __raw_readq
> > +#define __raw_writeq __raw_writeq
> > +#endif
> > +
> > +#define __raw_readb __raw_readb
> > +#define __raw_readw __raw_readw
> > +#define __raw_readl __raw_readl
> > +#define __raw_writeb __raw_writeb
> > +#define __raw_writew __raw_writew
> > +#define __raw_writel __raw_writel
> 
> The mips code defines the __raw variants with slightly different
> semantics on both barriers and byteswap, which makes it impractical
> to share any of the above.				
> 
> > +#define memset_io memset_io
> >  static inline void memset_io(volatile void __iomem *addr, unsigned 
> > char val, int count)
> >  {
> >  	memset((void __force *) addr, val, count);
> >  }
> > +#define memcpy_fromio memcpy_fromio
> >  static inline void memcpy_fromio(void *dst, const volatile void 
> > __iomem *src, int count)
> >  {
> >  	memcpy(dst, (void __force *) src, count);
> >  }
> > +#define memcpy_toio memcpy_toio
> 
> These are again the same as the generic version

OK, can remove this with the above change.
diff mbox series

Patch

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index cec8347f0b85..6756baadba6c 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -126,6 +126,7 @@  static inline phys_addr_t virt_to_phys(const volatile void *x)
  *     almost all conceivable cases a device driver should not be using
  *     this function
  */
+#define phys_to_virt phys_to_virt
 static inline void * phys_to_virt(unsigned long address)
 {
 	return __va(address);
@@ -359,6 +360,27 @@  __BUILD_MEMORY_PFX(__raw_, q, u64, 0)
 __BUILD_MEMORY_PFX(__mem_, q, u64, 0)
 #endif
 
+#define readb readb
+#define readw readw
+#define readl readl
+#define writeb writeb
+#define writew writew
+#define writel writel
+
+#ifdef CONFIG_64BIT
+#define readq readq
+#define writeq writeq
+#define __raw_readq __raw_readq
+#define __raw_writeq __raw_writeq
+#endif
+
+#define __raw_readb __raw_readb
+#define __raw_readw __raw_readw
+#define __raw_readl __raw_readl
+#define __raw_writeb __raw_writeb
+#define __raw_writew __raw_writew
+#define __raw_writel __raw_writel
+
 #define __BUILD_IOPORT_PFX(bus, bwlq, type)				\
 	__BUILD_IOPORT_SINGLE(bus, bwlq, type, 1, 0,)			\
 	__BUILD_IOPORT_SINGLE(bus, bwlq, type, 1, 0, _p)
@@ -374,6 +396,27 @@  BUILDIO_IOPORT(l, u32)
 BUILDIO_IOPORT(q, u64)
 #endif
 
+#define inb inb
+#define inw inw
+#define inl inl
+#define inb_p inb_p
+#define inw_p inw_p
+#define inl_p inl_p
+
+#define outb outb
+#define outw outw
+#define outl outl
+#define outb_p outb_p
+#define outw_p outw_p
+#define outl_p outl_p
+
+#ifdef CONFIG_64BIT
+#define inq inq
+#define outq outq
+#define inq_p inq_p
+#define outq_p outq_p
+#endif
+
 #define __BUILDIO(bwlq, type)						\
 									\
 __BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 1, 0, 0)
@@ -412,14 +455,6 @@  __BUILDIO(q, u64)
 #define writeq_be(val, addr)						\
 	__raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr))
 
-/*
- * Some code tests for these symbols
- */
-#ifdef CONFIG_64BIT
-#define readq				readq
-#define writeq				writeq
-#endif
-
 #define __BUILD_MEMORY_STRING(bwlq, type)				\
 									\
 static inline void writes##bwlq(volatile void __iomem *mem,		\
@@ -480,14 +515,39 @@  BUILDSTRING(l, u32)
 BUILDSTRING(q, u64)
 #endif
 
+#define insb insb
+#define insw insw
+#define insl insl
+#define outsb outsb
+#define outsw outsw
+#define outsl outsl
+
+#define readsb readsb
+#define readsw readsw
+#define readsl readsl
+#define writesb writesb
+#define writesw writesw
+#define writesl writesl
+
+#ifdef CONFIG_64BIT
+#define insq insq
+#define readsq readsq
+#define readsq readsq
+#define writesq writesq
+#endif
+
+
+#define memset_io memset_io
 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
 {
 	memset((void __force *) addr, val, count);
 }
+#define memcpy_fromio memcpy_fromio
 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
 {
 	memcpy(dst, (void __force *) src, count);
 }
+#define memcpy_toio memcpy_toio
 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
 {
 	memcpy((void __force *) dst, src, count);
@@ -556,4 +616,6 @@  extern void (*_dma_cache_inv)(unsigned long start, unsigned long size);
 
 void __ioread64_copy(void *to, const void __iomem *from, size_t count);
 
+#include <asm-generic/io.h>
+
 #endif /* _ASM_IO_H */