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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q8-20020a17090a2dc800b00237dd21c1b7si973208pjm.143.2023.03.02.17.45.10; Thu, 02 Mar 2023 17:45:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=e6wOhWil; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229747AbjCCBjI (ORCPT + 99 others); Thu, 2 Mar 2023 20:39:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229971AbjCCBjA (ORCPT ); Thu, 2 Mar 2023 20:39:00 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD3FA5552A; Thu, 2 Mar 2023 17:38:57 -0800 (PST) X-UUID: 245c3d6cb96411ed945fc101203acc17-20230303 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=BFH3u90gQu6CGSoKIn5r02HFDVd5hW7dCnj1CEuoUp0=; b=e6wOhWilXjps1X1tRVQ9Oz2nVXgC9FOM9APwQXlwgwMMhHJaCuu5PqfIQaPlgnuLAt3qdyy22X3EVPpjci84t0Z6m4kYBJwdnPCerU2JFUlYG6+m7FvOeXCn7LNuoNT8jZYXutLsFTyNSCsOEpJQyd43/uHffoSucct0HjgF9pM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.20,REQID:604cd57d-e854-4f84-a1d1-810a5cc82c5c,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:70 X-CID-INFO: VERSION:1.1.20,REQID:604cd57d-e854-4f84-a1d1-810a5cc82c5c,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:70 X-CID-META: VersionHash:25b5999,CLOUDID:b4880db2-beed-4dfc-bd9c-e1b22fa6ccc4,B ulkID:230303093849V0GIIFBN,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-UUID: 245c3d6cb96411ed945fc101203acc17-20230303 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 941020051; Fri, 03 Mar 2023 09:38:47 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Fri, 3 Mar 2023 09:38:44 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Fri, 3 Mar 2023 09:38:44 +0800 From: Allen-KH Cheng To: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , , , Allen-KH Cheng Subject: [RESEND 1/6] media: dt-bindings: media: mediatek: Rename child node names for decoder Date: Fri, 3 Mar 2023 09:38:37 +0800 Message-ID: <20230303013842.23259-2-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> References: <20230303013842.23259-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759309120935816267?= X-GMAIL-MSGID: =?utf-8?q?1759309120935816267?= In order to make the names of the child nodes more generic, we rename "vcodec-lat" and "vcodec-core" to "video-codec" for decoder in patternProperties and example. Signed-off-by: Allen-KH Cheng Reviewed-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- .../media/mediatek,vcodec-subdev-decoder.yaml | 61 ++----------------- 1 file changed, 5 insertions(+), 56 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index c4f20acdc1f8..46308cdaacc0 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -91,12 +91,13 @@ properties: # Required child node: patternProperties: - '^vcodec-lat@[0-9a-f]+$': + '^video-codec@[0-9a-f]+$': type: object properties: compatible: enum: + - mediatek,mtk-vcodec-core - mediatek,mtk-vcodec-lat - mediatek,mtk-vcodec-lat-soc @@ -145,59 +146,6 @@ patternProperties: additionalProperties: false - '^vcodec-core@[0-9a-f]+$': - type: object - - properties: - compatible: - const: mediatek,mtk-vcodec-core - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - iommus: - minItems: 1 - maxItems: 32 - description: | - List of the hardware port in respective IOMMU block for current Socs. - Refer to bindings/iommu/mediatek,iommu.yaml. - - clocks: - maxItems: 5 - - clock-names: - items: - - const: sel - - const: soc-vdec - - const: soc-lat - - const: vdec - - const: top - - assigned-clocks: - maxItems: 1 - - assigned-clock-parents: - maxItems: 1 - - power-domains: - maxItems: 1 - - required: - - compatible - - reg - - interrupts - - iommus - - clocks - - clock-names - - assigned-clocks - - assigned-clock-parents - - power-domains - - additionalProperties: false - required: - compatible - reg @@ -211,6 +159,7 @@ if: compatible: contains: enum: + - mediatek,mtk-vcodec-core - mediatek,mtk-vcodec-lat then: @@ -241,7 +190,7 @@ examples: #size-cells = <2>; ranges = <0 0 0 0x16000000 0 0x40000>; reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */ - vcodec-lat@10000 { + video-codec@10000 { compatible = "mediatek,mtk-vcodec-lat"; reg = <0 0x10000 0 0x800>; interrupts = ; @@ -264,7 +213,7 @@ examples: power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>; }; - vcodec-core@25000 { + video-codec@25000 { compatible = "mediatek,mtk-vcodec-core"; reg = <0 0x25000 0 0x1000>; interrupts = ;