From patchwork Thu Mar 2 05:24:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 63226 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp4063552wrd; Wed, 1 Mar 2023 21:53:26 -0800 (PST) X-Google-Smtp-Source: AK7set8uw9tso9JOqi4pddIk0styA1UvIx95GiAXH3SsxqgUxYZT6bhaNY/LQrjhqaVlmNPEpqQx X-Received: by 2002:a17:906:c516:b0:8de:e66a:ee68 with SMTP id bf22-20020a170906c51600b008dee66aee68mr6545392ejb.35.1677736406119; Wed, 01 Mar 2023 21:53:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677736406; cv=none; d=google.com; s=arc-20160816; b=KD/OmAgUU1lKSCoXt+2Af82No2PYtmrH+gLvuNFFqeycFkLOSsMuOYGOsF/8f18u+9 NI2J3l1VuGiSFJTX01D3TuuleyaB7hysRQzTi/r6mQPuNys3xm1edtp7im7KKVTQ8r9i HGH+J3J7PlO8seg1QLBaGm98kbVDojbFLnwsBszmRsKXcvDxmnrU9K7hNKQbUXKsWgoP ryv2I6QYSFbGLDa+RiXHiPKYa7mOF/6oJX39+OijikPIrLiIDmaojo+edV9ZQQIP3Fqq oiZKkXt3ee4NzkKBOPf2WtPeDDiTTZSdTrD1xKUdOxG+vgCiHMMzrus60JEbB2ZNHMSt rG2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=QHneXLYBHY7+PKhzjeNNAwkmNqTBqSO8csgVEzl5Wy8=; b=pkGBHuXCytk5DWHa0mY0gszao9bdddGBRksy+hUwWWLbQh44ydyt2vFIeU9PZC8zcc H2h2ZrfoRRk6VBc67dAQFLxv/CxMX0vE0juQbePGjq300O56Ehq/gTVlvcS00M1neepO roHkUHyHEfbzvZvH39vNrdC3oO/piQEiOZ+rRBQBVWi4HynyDEWRVNQmq09q/FDsc3hl aFoUiV/AA9jm6eNcWFvk+i6EGqXFd4U0URJYrEwe28W93/N/sZklQHAQY11ABf3hk204 aI0Z0biXBPn1tiU8ADIhQlK2aTqk9FKCV9F/S4qhO7Lytf3+Nv+yuLFXs4ri8TTHzn7J RUww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=cIlkQVWd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id rp8-20020a170906d96800b008bd8270048dsi17183253ejb.371.2023.03.01.21.53.03; Wed, 01 Mar 2023 21:53:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=cIlkQVWd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230076AbjCBFwF (ORCPT + 99 others); Thu, 2 Mar 2023 00:52:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229971AbjCBFve (ORCPT ); Thu, 2 Mar 2023 00:51:34 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AB7D521D7; Wed, 1 Mar 2023 21:51:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677736261; x=1709272261; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LJAIMdwNFTUrVjDLTbKC/eMN5WktrEucLVbwGrEfGpc=; b=cIlkQVWdtm12nZHIzbdnCkuv+FxLTsigcMK9m/FibReBdMaQEt5Qg37K wqsQradwVOf2OhGH4zFw/bKWfVrzd7HloWozzzqOb0dRmfC9qE3VPMgAi WtEaQZV4yZYBHYOWr+bS0ML1c/zNgsjRC7Jm1e6HDWDwLZmIF55WXqGn3 OC9YgwvD0q9LuyHNo5P30NEnfp1l6aEU79b/y6sXCDausr4SbfKHXNtPU JybKcj29w67aKj53Cm9ZjdnlTCbK7lcocq4w0vMg1aAFhOMu6S4SXYeQO A7CEIfkbpIz8p9BR255Z63gkjiIPKWylgp+y3n2z390BfyT/z35OESU/P A==; X-IronPort-AV: E=McAfee;i="6500,9779,10636"; a="420887206" X-IronPort-AV: E=Sophos;i="5.98,226,1673942400"; d="scan'208";a="420887206" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Mar 2023 21:50:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10636"; a="920530914" X-IronPort-AV: E=Sophos;i="5.98,226,1673942400"; d="scan'208";a="920530914" Received: from unknown (HELO fred..) ([172.25.112.68]) by fmsmga006.fm.intel.com with ESMTP; 01 Mar 2023 21:50:48 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org, andrew.cooper3@citrix.com, seanjc@google.com, pbonzini@redhat.com, ravi.v.shankar@intel.com Subject: [PATCH v4 14/34] x86/fred: header file with FRED definitions Date: Wed, 1 Mar 2023 21:24:51 -0800 Message-Id: <20230302052511.1918-15-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302052511.1918-1-xin3.li@intel.com> References: <20230302052511.1918-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759234129734146138?= X-GMAIL-MSGID: =?utf-8?q?1759234129734146138?= From: "H. Peter Anvin (Intel)" Add a header file for FRED prototypes and definitions. Signed-off-by: H. Peter Anvin (Intel) Tested-by: Shan Kang Signed-off-by: Xin Li --- arch/x86/include/asm/fred.h | 101 ++++++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) create mode 100644 arch/x86/include/asm/fred.h diff --git a/arch/x86/include/asm/fred.h b/arch/x86/include/asm/fred.h new file mode 100644 index 000000000000..2f337162da73 --- /dev/null +++ b/arch/x86/include/asm/fred.h @@ -0,0 +1,101 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * arch/x86/include/asm/fred.h + * + * Macros for Flexible Return and Event Delivery (FRED) + */ + +#ifndef ASM_X86_FRED_H +#define ASM_X86_FRED_H + +#ifdef CONFIG_X86_FRED + +#include +#include + +/* + * FRED return instructions + * + * Replace with "ERETS"/"ERETU" once binutils support FRED return instructions. + * The binutils version supporting FRED instructions is still TBD, and will + * update once we have it. + */ +#define ERETS _ASM_BYTES(0xf2,0x0f,0x01,0xca) +#define ERETU _ASM_BYTES(0xf3,0x0f,0x01,0xca) + +/* + * Event stack level macro for the FRED_STKLVLS MSR. + * Usage example: FRED_STKLVL(X86_TRAP_DF, 3) + * Multiple values can be ORd together. + */ +#define FRED_STKLVL(v,l) (_AT(unsigned long, l) << (2*(v))) + +/* FRED_CONFIG MSR */ +#define FRED_CONFIG_CSL_MASK 0x3 +#define FRED_CONFIG_SHADOW_STACK_SPACE _BITUL(3) +#define FRED_CONFIG_REDZONE(b) __ALIGN_KERNEL_MASK((b), _UL(0x3f)) +#define FRED_CONFIG_INT_STKLVL(l) (_AT(unsigned long, l) << 9) +#define FRED_CONFIG_ENTRYPOINT(p) _AT(unsigned long, (p)) + +/* FRED event type and vector bit width and counts */ +#define FRED_EVENT_TYPE_BITS 3 /* only 3 bits used in FRED 3.0 */ +#define FRED_EVENT_TYPE_COUNT _BITUL(FRED_EVENT_TYPE_BITS) +#define FRED_EVENT_VECTOR_BITS 8 +#define FRED_EVENT_VECTOR_COUNT _BITUL(FRED_EVENT_VECTOR_BITS) + +/* FRED EVENT_TYPE_OTHER vector numbers */ +#define FRED_SYSCALL 1 +#define FRED_SYSENTER 2 + +/* Flags above the CS selector (regs->csx) */ +#define FRED_CSL_ENABLE_NMI _BITUL(28) +#define FRED_CSL_ALLOW_SINGLE_STEP _BITUL(25) +#define FRED_CSL_INTERRUPT_SHADOW _BITUL(24) + +#ifndef __ASSEMBLY__ + +#include +#include + +/* FRED stack frame information */ +struct fred_info { + unsigned long edata; /* Event data: CR2, DR6, ... */ + unsigned long resv; +}; + +/* Full format of the FRED stack frame */ +struct fred_frame { + struct pt_regs regs; + struct fred_info info; +}; + +/* Getting the FRED frame information from a pt_regs pointer */ +static __always_inline struct fred_info *fred_info(struct pt_regs *regs) +{ + return &container_of(regs, struct fred_frame, regs)->info; +} + +static __always_inline unsigned long fred_event_data(struct pt_regs *regs) +{ + return fred_info(regs)->edata; +} + +/* + * How FRED event handlers are called. + * + * FRED event delivery establishes the full supervisor context + * by pushing everything related to the event being delivered + * to the FRED stack frame, e.g., the faulting linear address + * of a #PF is pushed as event data of the FRED #PF stack frame. + * Thus a struct pt_regs has everything needed and it's the only + * input parameter required for a FRED event handler. + */ +#define DECLARE_FRED_HANDLER(f) void f (struct pt_regs *regs) +#define DEFINE_FRED_HANDLER(f) noinstr DECLARE_FRED_HANDLER(f) +typedef DECLARE_FRED_HANDLER((*fred_handler)); + +#endif /* __ASSEMBLY__ */ + +#endif /* CONFIG_X86_FRED */ + +#endif /* ASM_X86_FRED_H */