Message ID | 20230301183759.16163-4-ddrokosov@sberdevices.ru |
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State | New |
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Series |
add Amlogic A1 clock controller drivers
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Commit Message
Dmitry Rokosov
March 1, 2023, 6:37 p.m. UTC
Add the documentation for Amlogic A1 PLL clock driver, and A1 PLL clock controller bindings. Also include new A1 clock controller dt bindings to MAINTAINERS. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> --- .../bindings/clock/amlogic,a1-pll-clkc.yaml | 59 +++++++++++++++++++ MAINTAINERS | 1 + include/dt-bindings/clock/a1-pll-clkc.h | 20 +++++++ 3 files changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h
Comments
On Wed, 01 Mar 2023 21:37:57 +0300, Dmitry Rokosov wrote: > Add the documentation for Amlogic A1 PLL clock driver, and A1 PLL > clock controller bindings. > Also include new A1 clock controller dt bindings to MAINTAINERS. > > Signed-off-by: Jian Hu <jian.hu@amlogic.com> > Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> > --- > .../bindings/clock/amlogic,a1-pll-clkc.yaml | 59 +++++++++++++++++++ > MAINTAINERS | 1 + > include/dt-bindings/clock/a1-pll-clkc.h | 20 +++++++ > 3 files changed, 80 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.example.dts:18:18: fatal error: dt-bindings/clock/a1-clkc.h: No such file or directory 18 | #include <dt-bindings/clock/a1-clkc.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[1]: *** [scripts/Makefile.lib:434: Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.example.dtb] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1508: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230301183759.16163-4-ddrokosov@sberdevices.ru The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 01/03/2023 19:37, Dmitry Rokosov wrote: > Add the documentation for Amlogic A1 PLL clock driver, and A1 PLL > clock controller bindings. > Also include new A1 clock controller dt bindings to MAINTAINERS. > > Signed-off-by: Jian Hu <jian.hu@amlogic.com> > Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> > --- > .../bindings/clock/amlogic,a1-pll-clkc.yaml | 59 +++++++++++++++++++ > MAINTAINERS | 1 + > include/dt-bindings/clock/a1-pll-clkc.h | 20 +++++++ > 3 files changed, 80 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > new file mode 100644 > index 000000000000..8bd2c948df86 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > @@ -0,0 +1,59 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Amlogic Meson A/C serials PLL Clock Control Unit > + > +maintainers: > + - Neil Armstrong <neil.armstrong@linaro.org> > + - Jerome Brunet <jbrunet@baylibre.com> > + - Jian Hu <jian.hu@jian.hu.com> > + - Dmitry Rokosov <ddrokosov@sberdevices.ru> > + > +properties: > + compatible: > + const: amlogic,a1-pll-clkc > + > + '#clock-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: input fixpll_in > + - description: input hifipll_in > + > + clock-names: > + items: > + - const: fixpll_in > + - const: hifipll_in > + > +required: > + - compatible > + - '#clock-cells' > + - reg > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/a1-clkc.h> Does not look like you tested the bindings. Please run `make dt_binding_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). > + apb { > + #address-cells = <2>; > + #size-cells = <2>; > + > + clock-controller@7c80 { > + compatible = "amlogic,a1-pll-clkc"; > + reg = <0 0x7c80 0 0x18c>; > + #clock-cells = <1>; > + clocks = <&clkc_periphs CLKID_FIXPLL_IN>, > + <&clkc_periphs CLKID_HIFIPLL_IN>; > + clock-names = "fixpll_in", "hifipll_in"; > + }; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index 39ff1a717625..8438bc9bd636 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1895,6 +1895,7 @@ L: linux-amlogic@lists.infradead.org > S: Maintained > F: Documentation/devicetree/bindings/clock/amlogic* > F: drivers/clk/meson/ > +F: include/dt-bindings/clock/a1* > F: include/dt-bindings/clock/gxbb* > F: include/dt-bindings/clock/meson* > > diff --git a/include/dt-bindings/clock/a1-pll-clkc.h b/include/dt-bindings/clock/a1-pll-clkc.h Filename matching bindings, so amlogic,a1-pll-clkc.h > new file mode 100644 > index 000000000000..3a559518c6e6 > --- /dev/null > +++ b/include/dt-bindings/clock/a1-pll-clkc.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ Any particular reason for using license other than in binding? Was it intentional (e.g. because it is derivative work)? > +/* > + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. > + * Author: Jian Hu <jian.hu@amlogic.com> > + * > + * Copyright (c) 2023, SberDevices. All Rights Reserved. > + * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru> Best regards, Krzysztof
Hello Krzysztof, Thank you for quick review! On Fri, Mar 03, 2023 at 09:28:22AM +0100, Krzysztof Kozlowski wrote: > On 01/03/2023 19:37, Dmitry Rokosov wrote: > > Add the documentation for Amlogic A1 PLL clock driver, and A1 PLL > > clock controller bindings. > > Also include new A1 clock controller dt bindings to MAINTAINERS. > > > > Signed-off-by: Jian Hu <jian.hu@amlogic.com> > > Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> > > --- > > .../bindings/clock/amlogic,a1-pll-clkc.yaml | 59 +++++++++++++++++++ > > MAINTAINERS | 1 + > > include/dt-bindings/clock/a1-pll-clkc.h | 20 +++++++ > > 3 files changed, 80 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > > create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h > > [...] > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/a1-clkc.h> > > Does not look like you tested the bindings. Please run `make > dt_binding_check` (see > Documentation/devicetree/bindings/writing-schema.rst for instructions). > I always run dt binding tests before sending the patch series. It's 'must have' prerequisite along with checkpatch. The first one (dt_binding_check): $ make ARCH=arm64 INSTALL_MOD_PATH=${INSTALL_MOD_PATH} \ CROSS_COMPILE="${CROSS_COMPILE}" DEPMOD=${DEPMOD} INSTALL_MOD_STRIP=1 -C ${KERNEL_PATH} \ dt_binding_check DT_SCHEMA_FILES=${DT_SCHEMA_PATH} The second one (dtbs_check): $ make ARCH=arm64 INSTALL_MOD_PATH=${INSTALL_MOD_PATH} \ CROSS_COMPILE="${CROSS_COMPILE}" DEPMOD=${DEPMOD} \ INSTALL_MOD_STRIP=1 -C ${KERNEL_PATH} \ dtbs_check DT_SCHEMA_FILES=${DT_SCHEMA_PATH} But, as you mentioned in the another patchset, I didn't take into account bisectability. In other words, I didn't execute above sanity check on the each patchset. Thank you for good catch, I'll fix it in the today v10 patch series. > > + apb { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + clock-controller@7c80 { > > + compatible = "amlogic,a1-pll-clkc"; > > + reg = <0 0x7c80 0 0x18c>; > > + #clock-cells = <1>; > > + clocks = <&clkc_periphs CLKID_FIXPLL_IN>, > > + <&clkc_periphs CLKID_HIFIPLL_IN>; > > + clock-names = "fixpll_in", "hifipll_in"; > > + }; > > + }; > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 39ff1a717625..8438bc9bd636 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -1895,6 +1895,7 @@ L: linux-amlogic@lists.infradead.org > > S: Maintained > > F: Documentation/devicetree/bindings/clock/amlogic* > > F: drivers/clk/meson/ > > +F: include/dt-bindings/clock/a1* > > F: include/dt-bindings/clock/gxbb* > > F: include/dt-bindings/clock/meson* > > > > diff --git a/include/dt-bindings/clock/a1-pll-clkc.h b/include/dt-bindings/clock/a1-pll-clkc.h > > Filename matching bindings, so amlogic,a1-pll-clkc.h You are totally right. But looks like other amlogic clock bindings don't follow this rule. So I'll change my patch series and send another patch series with fixup other amlogic clock bindings. > > > new file mode 100644 > > index 000000000000..3a559518c6e6 > > --- /dev/null > > +++ b/include/dt-bindings/clock/a1-pll-clkc.h > > @@ -0,0 +1,20 @@ > > +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ > > Any particular reason for using license other than in binding? Was it > intentional (e.g. because it is derivative work)? > No reason, actually. I've just used license which was introduced in the previous patch series versions by Jian Hu. I suppose, standard license usage should be okay. [...]
On Wed 01 Mar 2023 at 21:37, Dmitry Rokosov <ddrokosov@sberdevices.ru> wrote: > Add the documentation for Amlogic A1 PLL clock driver, and A1 PLL > clock controller bindings. > Also include new A1 clock controller dt bindings to MAINTAINERS. > > Signed-off-by: Jian Hu <jian.hu@amlogic.com> > Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> patch order is wrong. Bindings before drivers please. > --- > .../bindings/clock/amlogic,a1-pll-clkc.yaml | 59 +++++++++++++++++++ > MAINTAINERS | 1 + > include/dt-bindings/clock/a1-pll-clkc.h | 20 +++++++ > 3 files changed, 80 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > new file mode 100644 > index 000000000000..8bd2c948df86 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > @@ -0,0 +1,59 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Amlogic Meson A/C serials PLL Clock Control Unit > + > +maintainers: > + - Neil Armstrong <neil.armstrong@linaro.org> > + - Jerome Brunet <jbrunet@baylibre.com> > + - Jian Hu <jian.hu@jian.hu.com> > + - Dmitry Rokosov <ddrokosov@sberdevices.ru> > + > +properties: > + compatible: > + const: amlogic,a1-pll-clkc > + > + '#clock-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: input fixpll_in > + - description: input hifipll_in > + > + clock-names: > + items: > + - const: fixpll_in > + - const: hifipll_in > + > +required: > + - compatible > + - '#clock-cells' > + - reg > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/a1-clkc.h> > + apb { > + #address-cells = <2>; > + #size-cells = <2>; > + > + clock-controller@7c80 { > + compatible = "amlogic,a1-pll-clkc"; > + reg = <0 0x7c80 0 0x18c>; > + #clock-cells = <1>; > + clocks = <&clkc_periphs CLKID_FIXPLL_IN>, > + <&clkc_periphs CLKID_HIFIPLL_IN>; > + clock-names = "fixpll_in", "hifipll_in"; > + }; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index 39ff1a717625..8438bc9bd636 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1895,6 +1895,7 @@ L: linux-amlogic@lists.infradead.org > S: Maintained > F: Documentation/devicetree/bindings/clock/amlogic* > F: drivers/clk/meson/ > +F: include/dt-bindings/clock/a1* > F: include/dt-bindings/clock/gxbb* > F: include/dt-bindings/clock/meson* > > diff --git a/include/dt-bindings/clock/a1-pll-clkc.h b/include/dt-bindings/clock/a1-pll-clkc.h > new file mode 100644 > index 000000000000..3a559518c6e6 > --- /dev/null > +++ b/include/dt-bindings/clock/a1-pll-clkc.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ > +/* > + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. > + * Author: Jian Hu <jian.hu@amlogic.com> > + * > + * Copyright (c) 2023, SberDevices. All Rights Reserved. > + * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru> > + */ > + > +#ifndef __A1_PLL_CLKC_H > +#define __A1_PLL_CLKC_H > + > +#define CLKID_FIXED_PLL 1 > +#define CLKID_FCLK_DIV2 6 > +#define CLKID_FCLK_DIV3 7 > +#define CLKID_FCLK_DIV5 8 > +#define CLKID_FCLK_DIV7 9 > +#define CLKID_HIFI_PLL 10 > + > +#endif /* __A1_PLL_CLKC_H */
On Mon, Mar 06, 2023 at 12:33:48PM +0100, Jerome Brunet wrote: > > On Wed 01 Mar 2023 at 21:37, Dmitry Rokosov <ddrokosov@sberdevices.ru> wrote: > > > Add the documentation for Amlogic A1 PLL clock driver, and A1 PLL > > clock controller bindings. > > Also include new A1 clock controller dt bindings to MAINTAINERS. > > > > Signed-off-by: Jian Hu <jian.hu@amlogic.com> > > Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> > > patch order is wrong. > Bindings before drivers please. Totally agreed with you. That's why I see Rob's kernel robot errors. Will be rebased in the next version. [...]
diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml new file mode 100644 index 000000000000..8bd2c948df86 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic Meson A/C serials PLL Clock Control Unit + +maintainers: + - Neil Armstrong <neil.armstrong@linaro.org> + - Jerome Brunet <jbrunet@baylibre.com> + - Jian Hu <jian.hu@jian.hu.com> + - Dmitry Rokosov <ddrokosov@sberdevices.ru> + +properties: + compatible: + const: amlogic,a1-pll-clkc + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + + clocks: + items: + - description: input fixpll_in + - description: input hifipll_in + + clock-names: + items: + - const: fixpll_in + - const: hifipll_in + +required: + - compatible + - '#clock-cells' + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/a1-clkc.h> + apb { + #address-cells = <2>; + #size-cells = <2>; + + clock-controller@7c80 { + compatible = "amlogic,a1-pll-clkc"; + reg = <0 0x7c80 0 0x18c>; + #clock-cells = <1>; + clocks = <&clkc_periphs CLKID_FIXPLL_IN>, + <&clkc_periphs CLKID_HIFIPLL_IN>; + clock-names = "fixpll_in", "hifipll_in"; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 39ff1a717625..8438bc9bd636 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1895,6 +1895,7 @@ L: linux-amlogic@lists.infradead.org S: Maintained F: Documentation/devicetree/bindings/clock/amlogic* F: drivers/clk/meson/ +F: include/dt-bindings/clock/a1* F: include/dt-bindings/clock/gxbb* F: include/dt-bindings/clock/meson* diff --git a/include/dt-bindings/clock/a1-pll-clkc.h b/include/dt-bindings/clock/a1-pll-clkc.h new file mode 100644 index 000000000000..3a559518c6e6 --- /dev/null +++ b/include/dt-bindings/clock/a1-pll-clkc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + * Author: Jian Hu <jian.hu@amlogic.com> + * + * Copyright (c) 2023, SberDevices. All Rights Reserved. + * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru> + */ + +#ifndef __A1_PLL_CLKC_H +#define __A1_PLL_CLKC_H + +#define CLKID_FIXED_PLL 1 +#define CLKID_FCLK_DIV2 6 +#define CLKID_FCLK_DIV3 7 +#define CLKID_FCLK_DIV5 8 +#define CLKID_FCLK_DIV7 9 +#define CLKID_HIFI_PLL 10 + +#endif /* __A1_PLL_CLKC_H */