Message ID | 20230228164752.55682-10-manivannan.sadhasivam@linaro.org |
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State | New |
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Qcom: Fix PCI I/O range defined in devicetree
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Commit Message
Manivannan Sadhasivam
Feb. 28, 2023, 4:47 p.m. UTC
To maintain the uniformity, let's use the 0x prefix for the values of
ranges property.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index bc2ed73afb74..42fc33ab8b2e 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1469,8 +1469,8 @@ pcie: pci@10000000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0 0x10003000 0 0x00010000>, /* I/O */ - <0x82000000 0 0x10013000 0x10013000 0 0x007ed000>; /* memory */ + ranges = <0x81000000 0x0 0x00000000 0x10003000 0x0 0x00010000>, /* I/O */ + <0x82000000 0x0 0x10013000 0x10013000 0x0 0x007ed000>; /* memory */ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi";