diff mbox series

[v1,1/2] dt-bindings: PWM: Add StarFive PWM module

Message ID 20230228091345.70515-2-william.qiu@starfivetech.com
State New
Headers
Series StarFive's Pulse Width Modulation driver support |

Commit Message

William Qiu Feb. 28, 2023, 9:13 a.m. UTC 
  Add documentation to describe StarFive Pulse Width Modulation
controller driver.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
---
 .../devicetree/bindings/pwm/pwm-starfive.yaml | 54 +++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-starfive.yaml

Comments

Krzysztof Kozlowski Feb. 28, 2023, 2:07 p.m. UTC | #1 
On 28/02/2023 10:13, William Qiu wrote:
> Add documentation to describe StarFive Pulse Width Modulation
> controller driver.
> 
> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> ---
>  .../devicetree/bindings/pwm/pwm-starfive.yaml | 54 +++++++++++++++++++
>  1 file changed, 54 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-starfive.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-starfive.yaml b/Documentation/devicetree/bindings/pwm/pwm-starfive.yaml
> new file mode 100644
> index 000000000000..4ba2a8cc5344
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-starfive.yaml

Filename based on compatible, so starfive,jh7110-pwm.yaml

> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/pwm-starfive.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive PWM controller
> +
> +maintainers:
> +  - William Qiu <william.qiu@starfivetech.com>
> +
> +description:
> +  StarFive SoCs contain PWM and when operating in PWM mode, the PTC core generates
> +  binary signal with user-programmable low and high periods. Clock source for the
> +  PWM can be either system clockor external clock. Each PWM timer block provides 8
> +  PWM channels.
> +
> +allOf:
> +  - $ref: pwm.yaml#
> +
> +properties:
> +  compatible:
> +    items:

Drop items, not a list in your case.

> +      - const: starfive,jh7110-pwm
> +


Best regards,
Krzysztof
William Qiu March 1, 2023, 2:35 a.m. UTC | #2 
On 2023/2/28 22:07, Krzysztof Kozlowski wrote:
> On 28/02/2023 10:13, William Qiu wrote:
>> Add documentation to describe StarFive Pulse Width Modulation
>> controller driver.
>> 
>> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
>> ---
>>  .../devicetree/bindings/pwm/pwm-starfive.yaml | 54 +++++++++++++++++++
>>  1 file changed, 54 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-starfive.yaml
>> 
>> diff --git a/Documentation/devicetree/bindings/pwm/pwm-starfive.yaml b/Documentation/devicetree/bindings/pwm/pwm-starfive.yaml
>> new file mode 100644
>> index 000000000000..4ba2a8cc5344
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/pwm/pwm-starfive.yaml
> 
> Filename based on compatible, so starfive,jh7110-pwm.yaml
> 
>> @@ -0,0 +1,54 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/pwm/pwm-starfive.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive PWM controller
>> +
>> +maintainers:
>> +  - William Qiu <william.qiu@starfivetech.com>
>> +
>> +description:
>> +  StarFive SoCs contain PWM and when operating in PWM mode, the PTC core generates
>> +  binary signal with user-programmable low and high periods. Clock source for the
>> +  PWM can be either system clockor external clock. Each PWM timer block provides 8
>> +  PWM channels.
>> +
>> +allOf:
>> +  - $ref: pwm.yaml#
>> +
>> +properties:
>> +  compatible:
>> +    items:
> 
> Drop items, not a list in your case.
> 

Will drop. Thanks for taking time reviewing this patch series.

Best regards
William
>> +      - const: starfive,jh7110-pwm
>> +
> 
> 
> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pwm/pwm-starfive.yaml b/Documentation/devicetree/bindings/pwm/pwm-starfive.yaml
new file mode 100644
index 000000000000..4ba2a8cc5344
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-starfive.yaml
@@ -0,0 +1,54 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/pwm-starfive.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive PWM controller
+
+maintainers:
+  - William Qiu <william.qiu@starfivetech.com>
+
+description:
+  StarFive SoCs contain PWM and when operating in PWM mode, the PTC core generates
+  binary signal with user-programmable low and high periods. Clock source for the
+  PWM can be either system clockor external clock. Each PWM timer block provides 8
+  PWM channels.
+
+allOf:
+  - $ref: pwm.yaml#
+
+properties:
+  compatible:
+    items:
+      - const: starfive,jh7110-pwm
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  "#pwm-cells":
+    const: 3
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - resets
+
+additionalProperties: false
+
+examples:
+  - |
+    pwm@120d0000 {
+        compatible = "starfive,jh7110-pwm";
+        reg = <0x120d0000 0x10000>;
+        clocks = <&syscrg 121>;
+        resets = <&syscrg 108>;
+        #pwm-cells=<3>;
+    };