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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id j20-20020a2e3c14000000b00295a583a20bsm1203975lja.74.2023.02.28.05.44.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 05:44:30 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 14:44:04 +0100 Subject: [PATCH v6 7/9] interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks MIME-Version: 1.0 Message-Id: <20230228-topic-qos-v6-7-3c37a349656f@linaro.org> References: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> In-Reply-To: <20230228-topic-qos-v6-0-3c37a349656f@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Dmitry Baryshkov Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677591861; l=3956; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=j9XF4WxaLfGj9Ej6rkDHnjJlz9ADRRyGeXxkSRrXYCQ=; b=M35JcJbA4z7xVPt78oyUt8q1B96IPmZiN7M3R/pvpsHCHr4+uzvAmsdDhA2yk+jvIkg71yk3//ph jUAuZfHqABAngnnLpshAN45cGAeUqMNWoq/wICZzASvAitTUv4fD X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759082722861387775?= X-GMAIL-MSGID: =?utf-8?q?1759082722861387775?= For SMD RPM bus scaling to work, we need a pair of sleep-wake clocks. The variable number of them we previously supported was only a hack to keep the clocks required for QoS register access, but now that these are separated, we can leave bus_clks to the actual bus clocks. In cases where there is no actual bus scaling (such as A0NoC on MSM8996 and GNoC on SDM660 where the HLOS is only supposed to program the QoS registers and the bus is either static or controlled remotely), allow for no clock scaling with a boolean property. Remove all the code related to allowing an arbitrary number of bus_clks, replace the number by BUS_CLK_MAX (= 2) and guard the bus clock paths to ensure they are not taken on non-scaling buses. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 14 +++----------- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- drivers/interconnect/qcom/msm8996.c | 1 + drivers/interconnect/qcom/sdm660.c | 1 + 4 files changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 446f6df9bc98..48eb4394b84e 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -485,17 +485,9 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < cd_num; i++) qp->intf_clks[i].id = cds[i]; - if (desc->num_bus_clocks) { - cds = desc->bus_clocks; - cd_num = desc->num_bus_clocks; - } else { - cds = bus_clocks; - cd_num = ARRAY_SIZE(bus_clocks); - } - - for (i = 0; i < cd_num; i++) - qp->bus_clks[i].id = cds[i]; - qp->num_bus_clks = cd_num; + qp->num_bus_clks = desc->no_clk_scaling ? 0 : NUM_BUS_CLKS; + for (i = 0; i < qp->num_bus_clks; i++) + qp->bus_clks[i].id = bus_clocks[i]; qp->type = desc->type; qp->qos_offset = desc->qos_offset; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index a4ef45b4a9e0..3cddff44b4ef 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -25,7 +25,7 @@ enum qcom_icc_type { /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @num_bus_clks: the total number of bus_clks clk_bulk_data entries + * @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2) * @num_intf_clks: the total number of intf_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access @@ -100,10 +100,10 @@ struct qcom_icc_desc { struct qcom_icc_node * const *nodes; size_t num_nodes; const char * const *bus_clocks; - size_t num_bus_clocks; const char * const *intf_clocks; size_t num_intf_clocks; bool has_bus_pd; + bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; unsigned int qos_offset; diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 1a5e0ad36cc4..347fe59ec293 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1820,6 +1820,7 @@ static const struct qcom_icc_desc msm8996_a0noc = { .intf_clocks = a0noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a0noc_intf_clocks), .has_bus_pd = true, + .no_clk_scaling = true, .regmap_cfg = &msm8996_a0noc_regmap_config }; diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 0e8a96f4ce90..7ffaf70d62d3 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1616,6 +1616,7 @@ static const struct qcom_icc_desc sdm660_gnoc = { .nodes = sdm660_gnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_gnoc_nodes), .regmap_cfg = &sdm660_gnoc_regmap_config, + .no_clk_scaling = true, }; static struct qcom_icc_node * const sdm660_mnoc_nodes[] = {