Message ID | 20230227084016.3368-10-santosh.shukla@amd.com |
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State | New |
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SVM: virtual NMI
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Commit Message
Santosh Shukla
Feb. 27, 2023, 8:40 a.m. UTC
VNMI exposes 3 capability bits (V_NMI, V_NMI_MASK, and V_NMI_ENABLE) to virtualize NMI and NMI_MASK, Those capability bits are part of VMCB::intr_ctrl - V_NMI_PENDING_MASK(11) - Indicates whether a virtual NMI is pending in the guest. V_NMI_BLOCKING_MASK(12) - Indicates whether virtual NMI is masked in the guest. V_NMI_ENABLE_MASK(26) - Enables the NMI virtualization feature for the guest. When Hypervisor wants to inject NMI, it will set V_NMI bit, Processor will clear the V_NMI bit and Set the V_NMI_MASK which means the Guest is handling NMI, After the guest handled the NMI, The processor will clear the V_NMI_MASK on the successful completion of IRET instruction Or if VMEXIT occurs while delivering the virtual NMI. To enable the VNMI capability, Hypervisor need to program V_NMI_ENABLE_MASK bit 1. Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Signed-off-by: Santosh Shukla <santosh.shukla@amd.com> --- v3: - Renamed V_NMI bits per Sean's v2 comment for better readability. https://lore.kernel.org/all/66f93354-22b1-a2aa-f64c-6e70b9b8063c@amd.com/ arch/x86/include/asm/svm.h | 9 +++++++++ 1 file changed, 9 insertions(+)
Comments
On Mon, Feb 27, 2023, Santosh Shukla wrote: > VNMI exposes 3 capability bits (V_NMI, V_NMI_MASK, and V_NMI_ENABLE) to > virtualize NMI and NMI_MASK, Those capability bits are part of > VMCB::intr_ctrl - > V_NMI_PENDING_MASK(11) - Indicates whether a virtual NMI is pending in the > guest. > V_NMI_BLOCKING_MASK(12) - Indicates whether virtual NMI is masked in the > guest. > V_NMI_ENABLE_MASK(26) - Enables the NMI virtualization feature for the > guest. This is way harder to read than it needs to be. The intent of the various rules for line length and whatnot is to make code/changelogs easier to read. That intent is lost if code/changelogs are written without actually considering the rules. In other words, don't write changeloges, comments, etc. without thinking about how the result will look when the line length rules apply. Add defines for three new bits in VMVC::int_ctrl that are part of SVM's Virtual NMI (vNMI) support: V_NMI_PENDING_MASK(11) - Virtual NMI is pending V_NMI_BLOCKING_MASK(12) - Virtual NMI is masked V_NMI_ENABLE_MASK(26) - Enable NMI virtualization To "inject" an NMI, the hypervisor (KVM) sets V_NMI_PENDING. When the CPU services the pending vNMI, hardware clears V_NMI_PENDING and sets V_NMI_BLOCKING, e.g. to indicate that the vCPU is handling an NMI. Hardware clears V_NMI_BLOCKING upon successful execution of IRET, or if a VM-Exit occurs while delivering the virtual NMI.
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index cb1ee53ad3b1..9691081d9231 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -183,6 +183,12 @@ struct __attribute__ ((__packed__)) vmcb_control_area { #define V_GIF_SHIFT 9 #define V_GIF_MASK (1 << V_GIF_SHIFT) +#define V_NMI_PENDING_SHIFT 11 +#define V_NMI_PENDING_MASK (1 << V_NMI_PENDING_SHIFT) + +#define V_NMI_BLOCKING_SHIFT 12 +#define V_NMI_BLOCKING_MASK (1 << V_NMI_BLOCKING_SHIFT) + #define V_INTR_PRIO_SHIFT 16 #define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT) @@ -197,6 +203,9 @@ struct __attribute__ ((__packed__)) vmcb_control_area { #define V_GIF_ENABLE_SHIFT 25 #define V_GIF_ENABLE_MASK (1 << V_GIF_ENABLE_SHIFT) +#define V_NMI_ENABLE_SHIFT 26 +#define V_NMI_ENABLE_MASK (1 << V_NMI_ENABLE_SHIFT) + #define AVIC_ENABLE_SHIFT 31 #define AVIC_ENABLE_MASK (1 << AVIC_ENABLE_SHIFT)