diff mbox series

[V4,3/3] spi: tegra210-quad: set half duplex flag

Message ID 20230224154941.68587-4-kyarlagadda@nvidia.com
State New
Headers
Series Tegra TPM driver with HW flow control |

Commit Message

Krishna Yarlagadda Feb. 24, 2023, 3:49 p.m. UTC 
  Tegra QSPI controller only supports half duplex transfers.
Set half duplex constrain flag.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
---
 drivers/spi/spi-tegra210-quad.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Mark Brown Feb. 24, 2023, 4:37 p.m. UTC | #1 
On Fri, Feb 24, 2023 at 09:19:41PM +0530, Krishna Yarlagadda wrote:
> Tegra QSPI controller only supports half duplex transfers.
> Set half duplex constrain flag.

This was already applied I think?  If any changes are required to what
was applied please send an incremental patch.
Krishna Yarlagadda Feb. 24, 2023, 4:43 p.m. UTC | #2 
> -----Original Message-----
> From: Mark Brown <broonie@kernel.org>
> Sent: 24 February 2023 22:08
> To: Krishna Yarlagadda <kyarlagadda@nvidia.com>
> Cc: robh+dt@kernel.org; peterhuewe@gmx.de; jgg@ziepe.ca;
> jarkko@kernel.org; krzysztof.kozlowski+dt@linaro.org; linux-
> spi@vger.kernel.org; linux-tegra@vger.kernel.org; linux-
> integrity@vger.kernel.org; linux-kernel@vger.kernel.org;
> thierry.reding@gmail.com; Jonathan Hunter <jonathanh@nvidia.com>;
> Sowjanya Komatineni <skomatineni@nvidia.com>; Laxman Dewangan
> <ldewangan@nvidia.com>
> Subject: Re: [Patch V4 3/3] spi: tegra210-quad: set half duplex flag
> 
> On Fri, Feb 24, 2023 at 09:19:41PM +0530, Krishna Yarlagadda wrote:
> > Tegra QSPI controller only supports half duplex transfers.
> > Set half duplex constrain flag.
> 
> This was already applied I think?  If any changes are required to what
> was applied please send an incremental patch.
Dropped wrong patch. Will take care in next version.
diff mbox series

Patch

diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c
index 39dec2dc161b..fe15fa6eecd1 100644
--- a/drivers/spi/spi-tegra210-quad.c
+++ b/drivers/spi/spi-tegra210-quad.c
@@ -1553,6 +1553,7 @@  static int tegra_qspi_probe(struct platform_device *pdev)
 	master->mode_bits = SPI_MODE_0 | SPI_MODE_3 | SPI_CS_HIGH |
 			    SPI_TX_DUAL | SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD;
 	master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | SPI_BPW_MASK(8);
+	master->flags = SPI_CONTROLLER_HALF_DUPLEX;
 	master->setup = tegra_qspi_setup;
 	master->transfer_one_message = tegra_qspi_transfer_one_message;
 	master->num_chipselect = 1;