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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id i19-20020a056512007300b004dd7fefd2c8sm524046lfo.242.2023.02.24.05.08.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 05:08:03 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Sebastian Reichel , Stephan Gerhold , Luca Weiss , Iskren Chernev , Conor Dooley , Chanho Park , Lorenzo Pieralisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] arm64: dts: qcom: sc8280xp: Use correct CPU compatibles Date: Fri, 24 Feb 2023 14:07:58 +0100 Message-Id: <20230224130759.45579-2-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230224130759.45579-1-konrad.dybcio@linaro.org> References: <20230224130759.45579-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758719631599855695?= X-GMAIL-MSGID: =?utf-8?q?1758719631599855695?= Cores 0-3 are CA78C r0p0, cores 4-7 are CX1C r0p0. Use the correct compatibles instead of the placeholder qcom,kryo. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 0d02599d8867..9c186ba55cdc 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -43,7 +43,7 @@ cpus { CPU0: cpu@0 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a78c"; reg = <0x0 0x0>; enable-method = "psci"; capacity-dmips-mhz = <602>; @@ -67,7 +67,7 @@ L3_0: l3-cache { CPU1: cpu@100 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a78c"; reg = <0x0 0x100>; enable-method = "psci"; capacity-dmips-mhz = <602>; @@ -87,7 +87,7 @@ L2_100: l2-cache { CPU2: cpu@200 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a78c"; reg = <0x0 0x200>; enable-method = "psci"; capacity-dmips-mhz = <602>; @@ -107,7 +107,7 @@ L2_200: l2-cache { CPU3: cpu@300 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a78c"; reg = <0x0 0x300>; enable-method = "psci"; capacity-dmips-mhz = <602>; @@ -127,7 +127,7 @@ L2_300: l2-cache { CPU4: cpu@400 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-x1c"; reg = <0x0 0x400>; enable-method = "psci"; capacity-dmips-mhz = <1024>; @@ -147,7 +147,7 @@ L2_400: l2-cache { CPU5: cpu@500 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-x1c"; reg = <0x0 0x500>; enable-method = "psci"; capacity-dmips-mhz = <1024>; @@ -167,7 +167,7 @@ L2_500: l2-cache { CPU6: cpu@600 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-x1c"; reg = <0x0 0x600>; enable-method = "psci"; capacity-dmips-mhz = <1024>; @@ -187,7 +187,7 @@ L2_600: l2-cache { CPU7: cpu@700 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-x1c"; reg = <0x0 0x700>; enable-method = "psci"; capacity-dmips-mhz = <1024>;