From patchwork Mon May 29 13:52:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 100284 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1535701vqr; Mon, 29 May 2023 07:02:13 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5ViRTRHov5DzrRsBVTTlZSfb7tjI9LIa7sZxJDFrpC+XkHXnH1JeDkyxCC31nX0t4erD3c X-Received: by 2002:a05:6a00:10c1:b0:634:7ba3:d140 with SMTP id d1-20020a056a0010c100b006347ba3d140mr14445181pfu.15.1685368932953; Mon, 29 May 2023 07:02:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685368932; cv=none; d=google.com; s=arc-20160816; b=lI88wLI/jIeivMQP/Ol6hoIe91jwRFMhq17ADnVQaqsRosijQnlmZYYmQuTGDURabS a6WvZmBm19FEBvdk1Xw2shga2G2wKf0IdmPfTHm+q4PR+2UYLOHg8QMQ0wxtCAAZEhQW +75NFHZ6ctzBbAslx+qSowoDFmT+RRmKXicuSJHpP1OXvhKyDnI5EMM3eYfXi01Pj3cp 1/YW1odRh/Fb48HMg4FpUgQVQzCZa8UWLTIdAVcHuQJuDWJ/OIc6iej/4w/j0PLcRI8F mwBAXblmzKaeFlJ0ufNFqiUBv8sB0Rz7cFjXeWczqx0rb1Z5bA5BwY2ZVYtwzm7lfAAv vqzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=qFYsjcpB0Nba4u0VqORGhd4E3cIiBrU4W4oXEsIChBs=; b=PJ46zJWF6KbAsFtjXSXdCd9M/rU5/e0VhpN72D4PwW98+w2iAayxxXa4Gr34M2FCao lbjsM8hZ3RhOPj9AO0IuGCmZMY+hvWVP7nVpyI99hq49MexUj1G8upV6tOdxsVgqAV1Z UJDFmeT4tboxap8W61DtxF35SRaqTBKHsDTX0KcYCyCravDYw5YF6erH2frG34eCRRJb HuO3SqJD+eOPA5Mp/neEQr78gXGR8kTtvOL1LF3kzCn4S8eg5OjLHjPNmwvlypIGGUt4 GUEkvW5EpEEDOjuw6tYor0Rs0tdFCNP0SrE7ROPqXjK4jJZ+PJpxxoNnloXFoeVCiM9w jcZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RMWt3A1X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q30-20020a63751e000000b004fbe5ede659si420567pgc.317.2023.05.29.07.02.00; Mon, 29 May 2023 07:02:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RMWt3A1X; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230118AbjE2Nxl (ORCPT + 99 others); Mon, 29 May 2023 09:53:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229981AbjE2Nw7 (ORCPT ); Mon, 29 May 2023 09:52:59 -0400 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A65241BD for ; Mon, 29 May 2023 06:52:44 -0700 (PDT) Received: by mail-lf1-x12b.google.com with SMTP id 2adb3069b0e04-4f4bd608cf4so3708332e87.1 for ; Mon, 29 May 2023 06:52:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685368363; x=1687960363; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qFYsjcpB0Nba4u0VqORGhd4E3cIiBrU4W4oXEsIChBs=; b=RMWt3A1XwbC22/nrZGneoME8qUo9Uk1/nwlsoBBoDVsjR5keDACzXx0Kq13uKfskdH NRDJvbukCDqz9v2XYQ8H5L86iEcrZhlqNkxNygotPsv84Wtyr6egUkI4+4lscSpvrkG1 uJIZpKGLnqKYSmCzchIkzuPeTq+o/FdDsc60f9V6wHM/13r+RN+Lf/iiWw0J0rLC7zrU CQmAX33pXI+N2jLEuWO0TQwhDpnnit1bGWmBI9wLvsn6m9OO4CI7mMQixxe9iwtg8wi+ qKNJ0/DGSCY2fcabAwh1kVPJceAWmRdAU7C5EpbF98ZWuaHTgYkP89YAVHEzzgZShhKT C2BA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685368363; x=1687960363; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qFYsjcpB0Nba4u0VqORGhd4E3cIiBrU4W4oXEsIChBs=; b=C7fSL0smJR/XePqXZNtGC4mWUkX4VroRDJtjObfa61Okogd1mQI8PTsy7K0nk0BYky b1IDoL2axPHJdpLqW83NiLjTlZr+kExdkpn0bKJHgS/Dat2VKnK6yRJQso7Lcw9Jc4v+ n/aA85fS6X71WWH3ZU19hCkkrGfj2coqzBMABr4Hj/YY0V1rG+VjV6D+ZbkITvpnOyEd 1XlQBnMkuYv2g4SOH4e9UPYZw2xi8axfJnR/2sDPcHkYo2IqaTRtQNF4YfIEnMOZy/oj 36cWIAII3FW3oEpD8pzdOlhs53Od0JVX/4Dhut/OcA16Epc8tBOcZqcXUs8/nF4ucPvs CKxw== X-Gm-Message-State: AC+VfDzTAnQHTxE0T+pgy9wG6z1FcLtfkkmakWpm57CzcQjw1TwswwvH ioVNX/h8tKOe1XvVU7EYPG6NVw== X-Received: by 2002:ac2:5635:0:b0:4f4:d0ab:97e0 with SMTP id b21-20020ac25635000000b004f4d0ab97e0mr3419132lff.20.1685368362943; Mon, 29 May 2023 06:52:42 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c16-20020ac25310000000b004f2532cfbc1sm4700lfh.81.2023.05.29.06.52.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 May 2023 06:52:42 -0700 (PDT) From: Konrad Dybcio Date: Mon, 29 May 2023 15:52:31 +0200 Subject: [PATCH v8 12/18] drm/msm/a6xx: Add support for A619_holi MIME-Version: 1.0 Message-Id: <20230223-topic-gmuwrapper-v8-12-69c68206609e@linaro.org> References: <20230223-topic-gmuwrapper-v8-0-69c68206609e@linaro.org> In-Reply-To: <20230223-topic-gmuwrapper-v8-0-69c68206609e@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Akhil P Oommen , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark , Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685368343; l=4010; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=aKOKSCJ6t3/Hd9vl27cppwKNdpDBx2SmjHodX0JtW8A=; b=vp5j5jt5ELZFOf833i3i+IWDRtEHW/GspmcVxCdLf0R0JQFI8wRsHvq7+nPvtfsa8pGmTCMg2 dv92MFLRe8xBZSIQ5vW8kFquo5y3clTs54kq40TgaslWQY8S40YzuVu X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767237414519575878?= X-GMAIL-MSGID: =?utf-8?q?1767237414519575878?= A619_holi is a GMU-less variant of the already-supported A619 GPU. It's present on at least SM4350 (holi) and SM6375 (blair). No mesa changes are required. Add the required kernel-side support for it. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 27 +++++++++++++++++++++++++-- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 +++++ 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 0a44762dbb6d..bb04f65e6f68 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -810,6 +810,9 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu) if (adreno_is_a618(adreno_gpu)) return; + if (adreno_is_a619_holi(adreno_gpu)) + hbb_lo = 0; + if (adreno_is_a640_family(adreno_gpu)) amsbc = 1; @@ -1027,7 +1030,12 @@ static int hw_init(struct msm_gpu *gpu) } /* Clear GBIF halt in case GX domain was not collapsed */ - if (a6xx_has_gbif(adreno_gpu)) { + if (adreno_is_a619_holi(adreno_gpu)) { + gpu_write(gpu, REG_A6XX_GBIF_HALT, 0); + gpu_write(gpu, REG_A6XX_RBBM_GPR0_CNTL, 0); + /* Let's make extra sure that the GPU can access the memory.. */ + mb(); + } else if (a6xx_has_gbif(adreno_gpu)) { gpu_write(gpu, REG_A6XX_GBIF_HALT, 0); gpu_write(gpu, REG_A6XX_RBBM_GBIF_HALT, 0); /* Let's make extra sure that the GPU can access the memory.. */ @@ -1036,6 +1044,9 @@ static int hw_init(struct msm_gpu *gpu) gpu_write(gpu, REG_A6XX_RBBM_SECVID_TSB_CNTL, 0); + if (adreno_is_a619_holi(adreno_gpu)) + a6xx_sptprac_enable(gmu); + /* * Disable the trusted memory range - we don't actually supported secure * memory rendering at this point in time and we don't want to block off @@ -1656,12 +1667,18 @@ static void a6xx_llc_slices_init(struct platform_device *pdev, #define GBIF_CLIENT_HALT_MASK BIT(0) #define GBIF_ARB_HALT_MASK BIT(1) #define VBIF_XIN_HALT_CTRL0_MASK GENMASK(3, 0) +#define VBIF_RESET_ACK_MASK 0xF0 +#define GPR0_GBIF_HALT_REQUEST 0x1E0 void a6xx_bus_clear_pending_transactions(struct adreno_gpu *adreno_gpu, bool gx_off) { struct msm_gpu *gpu = &adreno_gpu->base; - if (!a6xx_has_gbif(adreno_gpu)) { + if (adreno_is_a619_holi(adreno_gpu)) { + gpu_write(gpu, 0x18, GPR0_GBIF_HALT_REQUEST); + spin_until((gpu_read(gpu, REG_A6XX_RBBM_VBIF_GX_RESET_STATUS) & + (VBIF_RESET_ACK_MASK)) == VBIF_RESET_ACK_MASK); + } else if (!a6xx_has_gbif(adreno_gpu)) { gpu_write(gpu, REG_A6XX_VBIF_XIN_HALT_CTRL0, VBIF_XIN_HALT_CTRL0_MASK); spin_until((gpu_read(gpu, REG_A6XX_VBIF_XIN_HALT_CTRL1) & (VBIF_XIN_HALT_CTRL0_MASK)) == VBIF_XIN_HALT_CTRL0_MASK); @@ -1756,6 +1773,9 @@ static int a6xx_pm_resume(struct msm_gpu *gpu) if (ret) goto err_bulk_clk; + if (adreno_is_a619_holi(adreno_gpu)) + a6xx_sptprac_enable(gmu); + /* If anything goes south, tear the GPU down piece by piece.. */ if (ret) { err_bulk_clk: @@ -1815,6 +1835,9 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu) /* Drain the outstanding traffic on memory buses */ a6xx_bus_clear_pending_transactions(adreno_gpu, true); + if (adreno_is_a619_holi(adreno_gpu)) + a6xx_sptprac_disable(gmu); + clk_bulk_disable_unprepare(gpu->nr_clocks, gpu->grp_clks); pm_runtime_put_sync(gmu->gxpd); diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index ee5352bc5329..432fee5c1516 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -252,6 +252,11 @@ static inline int adreno_is_a619(struct adreno_gpu *gpu) return gpu->revn == 619; } +static inline int adreno_is_a619_holi(struct adreno_gpu *gpu) +{ + return adreno_is_a619(gpu) && adreno_has_gmu_wrapper(gpu); +} + static inline int adreno_is_a630(struct adreno_gpu *gpu) { return gpu->revn == 630;