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[83.9.2.151]) by smtp.gmail.com with ESMTPSA id h23-20020a2ea497000000b0029599744c02sm414838lji.75.2023.02.23.04.06.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 04:07:00 -0800 (PST) From: Konrad Dybcio Date: Thu, 23 Feb 2023 13:06:44 +0100 Subject: [PATCH v3 10/15] drm/msm/a6xx: Fix A680 highest bank bit value MIME-Version: 1.0 Message-Id: <20230223-topic-gmuwrapper-v3-10-5be55a336819@linaro.org> References: <20230223-topic-gmuwrapper-v3-0-5be55a336819@linaro.org> In-Reply-To: <20230223-topic-gmuwrapper-v3-0-5be55a336819@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Akhil P Oommen Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677154003; l=1043; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=XyF/fIhqGhaqw/LSLnLQoZLpoApnz2Tm2KTMjRETKS0=; b=KNcnjoD9rWmy5mT4YH7OnatzxLE4iAZRwnM2y6dLWueGTxPwo3uCMS0NPrLwqJpUq5uh442AJSwo cgRHrMA2AlIAq7g9yAw9JnDnekIYxgGTePs30xvYuP3cIFpemrAR X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758623563645971558?= X-GMAIL-MSGID: =?utf-8?q?1758623563645971558?= According to the vendor sources, it's equal to 16, which makes hbb_lo equal to 3. Fixes: 840d10b64dad ("drm: msm: Add 680 gpu to the adreno gpu list") Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index b5017c56fa1b..2c4afecdd213 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -885,12 +885,18 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu) hbb_lo = 2; } - if (adreno_is_a640_family(adreno_gpu)) { + if (adreno_is_a640(adreno_gpu)) { amsbc = 1; /* HBB = 15 */ hbb_lo = 2; } + if (adreno_is_a680(adreno_gpu)) { + amsbc = 1; + /* HBB = 16 */ + hbb_lo = 3; + } + if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) { amsbc = 1; /* TODO: get ddr type from bootloader and use 2 for LPDDR4 */