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[194.187.74.233]) by smtp.gmail.com with ESMTPSA id p2-20020a2e93c2000000b0029477417d80sm721513ljh.85.2023.02.22.09.23.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 09:23:15 -0800 (PST) From: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski Cc: Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Miquel Raynal , Michael Walle , gregkh@linuxfoundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, u-boot@lists.denx.de Subject: [PATCH 1/4] nvmem: core: add per-cell post processing Date: Wed, 22 Feb 2023 18:22:42 +0100 Message-Id: <20230222172245.6313-2-zajec5@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222172245.6313-1-zajec5@gmail.com> References: <20230222172245.6313-1-zajec5@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758553054536327017?= X-GMAIL-MSGID: =?utf-8?q?1758553054536327017?= From: Michael Walle Instead of relying on the name the consumer is using for the cell, like it is done for the nvmem .cell_post_process configuration parameter, provide a per-cell post processing hook. This can then be populated by the NVMEM provider (or the NVMEM layout) when adding the cell. Signed-off-by: Michael Walle Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/core.c | 17 +++++++++++++++++ include/linux/nvmem-provider.h | 3 +++ 2 files changed, 20 insertions(+) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 6783cd8478d7..c5c9a4654241 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -52,6 +52,7 @@ struct nvmem_cell_entry { int bytes; int bit_offset; int nbits; + nvmem_cell_post_process_t read_post_process; struct device_node *np; struct nvmem_device *nvmem; struct list_head node; @@ -465,6 +466,7 @@ static int nvmem_cell_info_to_nvmem_cell_entry_nodup(struct nvmem_device *nvmem, cell->offset = info->offset; cell->bytes = info->bytes; cell->name = info->name; + cell->read_post_process = info->read_post_process; cell->bit_offset = info->bit_offset; cell->nbits = info->nbits; @@ -1429,6 +1431,13 @@ static int __nvmem_cell_read(struct nvmem_device *nvmem, if (cell->bit_offset || cell->nbits) nvmem_shift_read_buffer_in_place(cell, buf); + if (cell->read_post_process) { + rc = cell->read_post_process(nvmem->priv, id, index, + cell->offset, buf, cell->bytes); + if (rc) + return rc; + } + if (nvmem->cell_post_process) { rc = nvmem->cell_post_process(nvmem->priv, id, index, cell->offset, buf, cell->bytes); @@ -1537,6 +1546,14 @@ static int __nvmem_cell_entry_write(struct nvmem_cell_entry *cell, void *buf, si (cell->bit_offset == 0 && len != cell->bytes)) return -EINVAL; + /* + * Any cells which have a read_post_process hook are read-only because + * we cannot reverse the operation and it might affect other cells, + * too. + */ + if (cell->read_post_process) + return -EINVAL; + if (cell->bit_offset || cell->nbits) { buf = nvmem_cell_prepare_write_buffer(cell, buf, len); if (IS_ERR(buf)) diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h index b3c14ce87a65..f87fd64eee8f 100644 --- a/include/linux/nvmem-provider.h +++ b/include/linux/nvmem-provider.h @@ -54,6 +54,8 @@ struct nvmem_keepout { * @bit_offset: Bit offset if cell is smaller than a byte. * @nbits: Number of bits. * @np: Optional device_node pointer. + * @read_post_process: Callback for optional post processing of cell data + * on reads. */ struct nvmem_cell_info { const char *name; @@ -62,6 +64,7 @@ struct nvmem_cell_info { unsigned int bit_offset; unsigned int nbits; struct device_node *np; + nvmem_cell_post_process_t read_post_process; }; /**