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[83.9.2.151]) by smtp.gmail.com with ESMTPSA id c23-20020ac244b7000000b004db5081e3f7sm505126lfm.46.2023.02.22.13.47.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 13:47:18 -0800 (PST) From: Konrad Dybcio Date: Wed, 22 Feb 2023 22:47:14 +0100 Subject: [PATCH 5/5] drm/msm/a5xx: Enable optional icc voting from OPP tables MIME-Version: 1.0 Message-Id: <20230222-konrad-longbois-next-v1-5-01021425781b@linaro.org> References: <20230222-konrad-longbois-next-v1-0-01021425781b@linaro.org> In-Reply-To: <20230222-konrad-longbois-next-v1-0-01021425781b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677102430; l=807; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=TMGW8gjkiQwEJ0fii5rrgM+Nl4d+tDtzpTg1fjmA9zo=; b=o1Nbuq1XpVhn6xnmPyYkuaAq0xiZ0aski/AfFD81WLJwQsE/JusmS5elxNiSQcEnM76oc3Ers35U eiDijrx9C0uZlUc59nitgz2e4VYiOpcCz4G/cJuX7NgFzniXRWFC X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758569564505163002?= X-GMAIL-MSGID: =?utf-8?q?1758569564505163002?= Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework handle bus voting as part of power level setting. Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index d09221f97f71..a33af0cc27b6 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1775,5 +1775,9 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev) /* Set up the preemption specific bits and pieces for each ringbuffer */ a5xx_preempt_init(gpu); + ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL); + if (ret) + return ERR_PTR(ret); + return gpu; }