From patchwork Tue Feb 21 11:55:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 59937 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1821784wrn; Tue, 21 Feb 2023 04:01:49 -0800 (PST) X-Google-Smtp-Source: AK7set/70gVkMoiCI8cc+kP01sJ9mGo3c7wSje4mUrw86nocRtuXgsFaNZy+Excwmk1daN35xTBQ X-Received: by 2002:ac2:5298:0:b0:4da:9b7d:637e with SMTP id q24-20020ac25298000000b004da9b7d637emr1251875lfm.42.1676980908954; Tue, 21 Feb 2023 04:01:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676980908; cv=none; d=google.com; s=arc-20160816; b=cksX7ukrXd/5b9NHn8xMu096+MIUV7k4sWHnrnCwi4yGJRUb24uZHp9XZKGUrAW7xM C40j4DfEgGDv2SsRUzJjEP2H8Nxki9kkqnRf87IJNSdK58EEMGGKgCcbhyfEtFWGO3JS wgx7eGi4pkXCj3LEKVfuR3hD6TXaoi2n7Y/bhbjKkmChhpZwvuffu4cZ6MmkgaDavPaY Pg8kZkcpwYW/0FodMsLln667a3aFnQphHmJKXSHLy9zDVWgQ/zNsC9mYklQUZEb2OoVX lYuE+cLXevT59X4Dv2/SGJvjQdsVpBrx82yn8fza72ALJXqKvR8CJUh3Yl1LP9cbeWnw Lb4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7Gpb1sMgn12S142sdneBhi6bAmc7uSkNPwIwBUJuHJY=; b=h0aWk9FjPI3BPMVKSOAN9iHAsMyxYL1f8uAIXCWaUpw0CAzm7OPrhTIZwnUDwAGvlh dGATVFieNnZ6rykGXJN1iZ4qGWmqVx8OLEm8Th1GbMQLHZ7a6gPS/QHczR/J7BEkpQmG UAN3KjBgBJZqAy1Kt8qdLeMWUyHqMHxBLDUlETF1UUhekq2WgW9HoE+maROT1hvnwEuL Omklkr6/IWPUKG7GT7QvsGIkoiuENo1FDSD+a9UGGizPaxSAo2R2XUlFqIpMLdhSrsPv JfjiLUOGDJYWsByxsBMghyTPRm3Sg75GQX1XIc3Yv3zkrhlR8bQWM1mmRNMYZ+Oqm1Am RPKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=NA3rOW1h; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i24-20020a05640200d800b004acbeceab83si5528011edu.448.2023.02.21.04.01.24; Tue, 21 Feb 2023 04:01:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=NA3rOW1h; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234628AbjBUL7N (ORCPT + 99 others); Tue, 21 Feb 2023 06:59:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234451AbjBUL6J (ORCPT ); Tue, 21 Feb 2023 06:58:09 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33E8E28221; Tue, 21 Feb 2023 03:57:39 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 70C1966021C6; Tue, 21 Feb 2023 11:56:36 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1676980597; bh=TVcQKRssdAc9o2ZUajNdAkJkyh364bF8fOa6lB5Z2tE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NA3rOW1hGiPTmA6wq6XcQX9Igsbu097Od+igvm0r6hmcOD5VEzla+0zyBP7LNZpXS 8ZOA1icFqG1Wt29Wqu4E4xC8es4t1ZAblg3OtRN9nsT1lB5roF0u4tLO3MVC9Z01G0 JtUdPIZpmoPzNTwtx5xu+sj1MstnxBLLbQ2ptYCWWq8O4zbU8EpCFVYbtfa9B4cMoT Rspiajegiu7XZAUK1qv2QbbqoX0piogV/gkjxuNXNStlh+FvpAYrotxxI+YGRSdd4z gLARvD1OZTJEmWYeNf9uGneEnH9YmSttmNBatDcHKBxLGzI7ts5gq8vGM5sYWUhqs6 IEmgYBWJlZhCw== From: AngeloGioacchino Del Regno To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, chun-jie.chen@mediatek.com, daniel@makrotopia.org, fparent@baylibre.com, msp@baylibre.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, zhaojh329@gmail.com, sam.shih@mediatek.com, edward-jw.yang@mediatek.com, yangyingliang@huawei.com, granquet@baylibre.com, pablo.sun@mediatek.com, sean.wang@mediatek.com, chen.zhong@mediatek.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 32/54] clk: mediatek: mt7986-apmixed: Use PLL_AO flag to set critical clock Date: Tue, 21 Feb 2023 12:55:27 +0100 Message-Id: <20230221115549.360132-33-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230221115549.360132-1-angelogioacchino.delregno@collabora.com> References: <20230221115549.360132-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758441933325701859?= X-GMAIL-MSGID: =?utf-8?q?1758441933325701859?= Instead of calling clk_prepare_enable() at probe time, add the PLL_AO flag to CLK_APMIXED_ARMPLL clock: this will set CLK_IS_CRITICAL. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- drivers/clk/mediatek/clk-mt7986-apmixed.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt7986-apmixed.c b/drivers/clk/mediatek/clk-mt7986-apmixed.c index 62080ee4dbe3..227ca572056e 100644 --- a/drivers/clk/mediatek/clk-mt7986-apmixed.c +++ b/drivers/clk/mediatek/clk-mt7986-apmixed.c @@ -42,7 +42,7 @@ "clkxtal") static const struct mtk_pll_data plls[] = { - PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x0, 0, 32, + PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x0, PLL_AO, 32, 0x0200, 4, 0, 0x0204, 0), PLL(CLK_APMIXED_NET2PLL, "net2pll", 0x0210, 0x021C, 0x0, 0, 32, 0x0210, 4, 0, 0x0214, 0), @@ -77,8 +77,6 @@ static int clk_mt7986_apmixed_probe(struct platform_device *pdev) mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); - clk_prepare_enable(clk_data->hws[CLK_APMIXED_ARMPLL]->clk); - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); if (r) { pr_err("%s(): could not register clock provider: %d\n",