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[79.44.179.55]) by smtp.gmail.com with ESMTPSA id t14-20020a1709066bce00b008cff300cf47sm2804832ejs.72.2023.02.21.03.13.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Feb 2023 03:13:52 -0800 (PST) From: Andrea Righi To: Tudor Ambarus , Pratyush Yadav Cc: Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Cristian Birsan , Boris Brezillon , Emil Renner Berthing , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] mtd: spi-nor: fix shift-out-of-bounds in spi_nor_set_erase_type() Date: Tue, 21 Feb 2023 12:13:46 +0100 Message-Id: <20230221111346.34268-1-andrea.righi@canonical.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758439997608385150?= X-GMAIL-MSGID: =?utf-8?q?1758439997608385150?= It seems that according to JEDEC JESD216B Standard erase size needs to be a power of 2, but sometimes we set the size to 0 (e.g., in spi_nor_parse_4bait()) causing UBSAN warnings like the following: UBSAN: shift-out-of-bounds in drivers/mtd/spi-nor/core.c:2026:24 shift exponent 4294967295 is too large for 32-bit type 'int' Hardware name: Dell Inc. XPS 13 9300/077Y9N, BIOS 1.11.0 03/22/2022 Call Trace: show_stack+0x4e/0x61 dump_stack_lvl+0x4a/0x6f dump_stack+0x10/0x18 ubsan_epilogue+0x9/0x3a __ubsan_handle_shift_out_of_bounds.cold+0x61/0xef spi_nor_set_erase_type.cold+0x16/0x1e [spi_nor] spi_nor_parse_4bait+0x270/0x380 [spi_nor] spi_nor_parse_sfdp+0x47f/0x610 [spi_nor] Fix by checking if size is a power when setting struct spi_nor_erase_type, otherwise consider size, mask and shift as invalid. Fixes: 5390a8df769e ("mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories") Reported-by: Emil Renner Berthing Signed-off-by: Andrea Righi --- drivers/mtd/spi-nor/core.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index d67c926bca8b..3c5b5bf9cbd1 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2019,11 +2019,17 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps) void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size, u8 opcode) { - erase->size = size; erase->opcode = opcode; /* JEDEC JESD216B Standard imposes erase sizes to be power of 2. */ - erase->size_shift = ffs(erase->size) - 1; - erase->size_mask = (1 << erase->size_shift) - 1; + if (likely(is_power_of_2(size))) { + erase->size = size; + erase->size_shift = ffs(erase->size) - 1; + erase->size_mask = (1 << erase->size_shift) - 1; + } else { + erase->size = 0u; + erase->size_shift = ~0u; + erase->size_mask = ~0u; + } } /**