From patchwork Mon Feb 20 02:19:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 59232 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1094285wrn; Sun, 19 Feb 2023 18:39:01 -0800 (PST) X-Google-Smtp-Source: AK7set/gGZ6bRq4p2nf89JGAi8s7PnxwNt3X8L/tlX31sivrVIog/wY0O+NZ0/g6+lPt0wRjTfsN X-Received: by 2002:a17:902:e5d0:b0:196:5839:b36a with SMTP id u16-20020a170902e5d000b001965839b36amr3748274plf.8.1676860741353; Sun, 19 Feb 2023 18:39:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676860741; cv=none; d=google.com; s=arc-20160816; b=xJ+3liYvEwVOCmccIICKm9MsR+kawtg0Llg65/Tio2sBrj7ZoLOevON3v4qWeJZyFY q4tNq1FsNSKcZDEu9tmpVtA+DQUNlOegXuLEe4KgQrWSYfQ47Lny8sOOfklr7PkCuxRb ayj4w00q45x4MQoXIJtySzQlNd+uVZQd8cp0rzddTn8txsEjNSB3Yn34iXXCcH9KQpKr frgJfrZXSpXNa5L179ShCR1k0qrk9t/3BF7nVz6uHmlsG2jULA3vhFcE2SGdGex3IU18 DWS8f5zbs0qYq+Y+mGIFA27zviEjMJSiM566UoKg6h1PKZjYO2dl/Db7uwdmdc2XETyM EKPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from :dkim-signature; bh=eg7ULP2yOFlXcGh70ikESc8dnbS10xi+rzil4Da2hjo=; b=VljhxiRwmyWlA5gxAgjN4Gzu/uH9oy3nMEnVeiDioUP9o78WARWrVFUyEjqvoAC3Y6 azcuumKZMz0Og/sqthVom4dS+gZbcJ+RX67kQTe4xrlFtw6oIqoKjF2HlswVG0TCbubR g+OaZ7ancxu+1OZ8yOxidGQPzQK7GsqntWmxdB7Ub1+m3fRaeV6Xaq8QvgNHzYq94CjZ JH8PuiAdJ8hiyQ8JAx40kLD1fIdJGc9BawLwNnNEYWZW6OplgktSXTYnM4FwsbfgTBEW xNGJQeDxBl82AQbV7mAgppuAZfxETP201qDEEh08KYLiGRuafDQyQLRVnkDKL7mCzE6Y GG9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=HG6XHcfh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a188-20020a6366c5000000b004fbd68a7bdbsi12884985pgc.691.2023.02.19.18.38.48; Sun, 19 Feb 2023 18:39:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=HG6XHcfh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229709AbjBTCTj (ORCPT + 99 others); Sun, 19 Feb 2023 21:19:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229572AbjBTCTh (ORCPT ); Sun, 19 Feb 2023 21:19:37 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37596B45A; Sun, 19 Feb 2023 18:19:29 -0800 (PST) X-UUID: fc96a198b0c411ed945fc101203acc17-20230220 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=eg7ULP2yOFlXcGh70ikESc8dnbS10xi+rzil4Da2hjo=; b=HG6XHcfhCa/Vd45eedD0pqbI+SmS9mVlxRUyAYLCU/x6F9/zlzSmXcK/qKCGlq+CmilI484yypDKnElgKc/yVi8oYcgLdsnhOeC1nLylzRVGPHk4tnEJBzymLwRZsHOWzNZWxrJ/oolgvyL1mhoFmwxdPwkUNBIE0mp/OpA3UN8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.19,REQID:70d95068-b4e9-4a8c-8b74-7bc03879f6fc,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:90 X-CID-INFO: VERSION:1.1.19,REQID:70d95068-b4e9-4a8c-8b74-7bc03879f6fc,IP:0,URL :0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:90 X-CID-META: VersionHash:885ddb2,CLOUDID:33db7cf3-ddba-41c3-91d9-10eeade8eac7,B ulkID:230220101923RDTDXT43,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-UUID: fc96a198b0c411ed945fc101203acc17-20230220 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1732879497; Mon, 20 Feb 2023 10:19:21 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Mon, 20 Feb 2023 10:19:20 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 20 Feb 2023 10:19:20 +0800 From: Allen-KH Cheng To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= , Allen-KH Cheng Subject: [PATCH] arm64: dts: mediatek: Add cpufreq nodes for MT8192 Date: Mon, 20 Feb 2023 10:19:15 +0800 Message-ID: <20230220021915.9473-1-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-1.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,RDNS_NONE, SPF_HELO_PASS,T_SPF_TEMPERROR,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758315928793376621?= X-GMAIL-MSGID: =?utf-8?q?1758315928793376621?= Add the cpufreq nodes for MT8192 SoC. Signed-off-by: Allen-KH Cheng --- Fix a address warning on dtbs_check https://patchwork.kernel.org/project/linux-mediatek/patch/1609223471-24325-1-git-send-email-andrew-sh.cheng@mediatek.com/ [Allen-KH Cheng ] --- --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 424fc89cc6f7..181ec2db7a69 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -55,6 +55,7 @@ cpu0: cpu@0 { clock-frequency = <1701000000>; cpu-idle-states = <&cpu_sleep_l &cluster_sleep_l>; next-level-cache = <&l2_0>; + performance-domains = <&performance 1>; capacity-dmips-mhz = <530>; }; @@ -66,6 +67,7 @@ cpu1: cpu@100 { clock-frequency = <1701000000>; cpu-idle-states = <&cpu_sleep_l &cluster_sleep_l>; next-level-cache = <&l2_0>; + performance-domains = <&performance 1>; capacity-dmips-mhz = <530>; }; @@ -77,6 +79,7 @@ cpu2: cpu@200 { clock-frequency = <1701000000>; cpu-idle-states = <&cpu_sleep_l &cluster_sleep_l>; next-level-cache = <&l2_0>; + performance-domains = <&performance 1>; capacity-dmips-mhz = <530>; }; @@ -88,6 +91,7 @@ cpu3: cpu@300 { clock-frequency = <1701000000>; cpu-idle-states = <&cpu_sleep_l &cluster_sleep_l>; next-level-cache = <&l2_0>; + performance-domains = <&performance 1>; capacity-dmips-mhz = <530>; }; @@ -99,6 +103,7 @@ cpu4: cpu@400 { clock-frequency = <2171000000>; cpu-idle-states = <&cpu_sleep_b &cluster_sleep_b>; next-level-cache = <&l2_1>; + performance-domains = <&performance 1>; capacity-dmips-mhz = <1024>; }; @@ -110,6 +115,7 @@ cpu5: cpu@500 { clock-frequency = <2171000000>; cpu-idle-states = <&cpu_sleep_b &cluster_sleep_b>; next-level-cache = <&l2_1>; + performance-domains = <&performance 1>; capacity-dmips-mhz = <1024>; }; @@ -121,6 +127,7 @@ cpu6: cpu@600 { clock-frequency = <2171000000>; cpu-idle-states = <&cpu_sleep_b &cluster_sleep_b>; next-level-cache = <&l2_1>; + performance-domains = <&performance 1>; capacity-dmips-mhz = <1024>; }; @@ -132,6 +139,7 @@ cpu7: cpu@700 { clock-frequency = <2171000000>; cpu-idle-states = <&cpu_sleep_b &cluster_sleep_b>; next-level-cache = <&l2_1>; + performance-domains = <&performance 1>; capacity-dmips-mhz = <1024>; }; @@ -254,6 +262,12 @@ soc { compatible = "simple-bus"; ranges; + performance: performance-controller@11bc10 { + compatible = "mediatek,cpufreq-hw"; + reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>; + #performance-domain-cells = <1>; + }; + gic: interrupt-controller@c000000 { compatible = "arm,gic-v3"; #interrupt-cells = <4>;