[1/4] ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names properties
Commit Message
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
From R01UH0914EJ0120 Rev.1.20 HW manual, for full duplex channels
(SSI0/1/3) dma_rt interrupt has now being marked as reserved and similarly
for half duplex channel (SSI2) dma_rx and dma_tx interrupts have now being
marked as reserved (this applies to RZ/G2L and alike SoC's). This patch
updates the binding doc to match the same.
While at it also updated the example node.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../bindings/sound/renesas,rz-ssi.yaml | 21 +++++++++++--------
1 file changed, 12 insertions(+), 9 deletions(-)
Comments
On 17/02/2023 19:52, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> From R01UH0914EJ0120 Rev.1.20 HW manual, for full duplex channels
> (SSI0/1/3) dma_rt interrupt has now being marked as reserved and similarly
> for half duplex channel (SSI2) dma_rx and dma_tx interrupts have now being
> marked as reserved (this applies to RZ/G2L and alike SoC's). This patch
> updates the binding doc to match the same.
Do not use "This commit/patch".
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
@@ -25,14 +25,18 @@ properties:
maxItems: 1
interrupts:
- maxItems: 4
+ minItems: 2
+ maxItems: 3
interrupt-names:
- items:
- - const: int_req
- - const: dma_rx
- - const: dma_tx
- - const: dma_rt
+ oneOf:
+ - items:
+ - const: int_req
+ - const: dma_rx
+ - const: dma_tx
+ - items:
+ - const: int_req
+ - const: dma_rt
clocks:
maxItems: 4
@@ -106,9 +110,8 @@ examples:
reg = <0x10049c00 0x400>;
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,
<&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>,
<&audio_clk1>,