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[83.9.1.117]) by smtp.gmail.com with ESMTPSA id c13-20020a05651221ad00b004b53eb60e3csm645940lft.256.2023.02.17.02.46.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 02:46:35 -0800 (PST) From: Konrad Dybcio Date: Fri, 17 Feb 2023 11:46:23 +0100 Subject: [PATCH v5 02/10] interconnect: qcom: rpm: Add support for specifying channel num MIME-Version: 1.0 Message-Id: <20230217-topic-icc-fixes-v5-v5-2-c9a550f9fdb9@linaro.org> References: <20230217-topic-icc-fixes-v5-v5-0-c9a550f9fdb9@linaro.org> In-Reply-To: <20230217-topic-icc-fixes-v5-v5-0-c9a550f9fdb9@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Evan Green , Jun Nie , Greg Kroah-Hartman , Brian Masney , Dmitry Baryshkov , Yassine Oudjana Cc: Georgi Djakov , Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1676630791; l=2390; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=owy+HTbDiqD53bbeRzW7lMPyKDJvsQwv0VsM/tqOHBQ=; b=0wO3Kb2K2bNGrwgjHl+MB1VQsq1MjB8wGaF78Q/vMoe0wPvHb6brtdYreCFZmdJJzbIiqktjBaHP 0gnspTheC6/VF6pZ1rKlrLh+NcxWRKpNnF8d8gldzkL3cbKQXlZr X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758074881718144072?= X-GMAIL-MSGID: =?utf-8?q?1758074881718144072?= Some nodes, like EBI0 (DDR) or L3/LLCC, may be connected over more than one channel. This should be taken into account in bandwidth calcualtion, as we're supposed to feed msmbus with the per-channel bandwidth. Add support for specifying that and use it during bandwidth aggregation. Reviewed-by: Bryan O'Donoghue Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 7 ++++++- drivers/interconnect/qcom/icc-rpm.h | 2 ++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index ffbeeca8c2b0..6bd20f62f8ed 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -317,6 +317,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, { struct icc_node *node; struct qcom_icc_node *qn; + u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; int i; /* Initialise aggregate values */ @@ -334,7 +335,11 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, list_for_each_entry(node, &provider->nodes, node_list) { qn = node->data; for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { - agg_avg[i] += qn->sum_avg[i]; + if (qn->channels) + sum_avg[i] = div_u64(qn->sum_avg[i], qn->channels); + else + sum_avg[i] = qn->sum_avg[i]; + agg_avg[i] += sum_avg[i]; agg_peak[i] = max_t(u64, agg_peak[i], qn->max_peak[i]); } } diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 8ba1918d7997..8aed5400afda 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -66,6 +66,7 @@ struct qcom_icc_qos { * @id: a unique node identifier * @links: an array of nodes where we can go next while traversing * @num_links: the total number of @links + * @channels: number of channels at this node (e.g. DDR channels) * @buswidth: width of the interconnect between a node and the bus (bytes) * @sum_avg: current sum aggregate value of all avg bw requests * @max_peak: current max aggregate value of all peak bw requests @@ -78,6 +79,7 @@ struct qcom_icc_node { u16 id; const u16 *links; u16 num_links; + u16 channels; u16 buswidth; u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; u64 max_peak[QCOM_ICC_NUM_BUCKETS];