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[2620:137:e000::1:20]) by mx.google.com with ESMTP id v15-20020a17090a458f00b00226e01736f8si1441912pjg.109.2023.03.08.23.50.40; Wed, 08 Mar 2023 23:50:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hfYUvbEJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230041AbjCIHrp (ORCPT + 99 others); Thu, 9 Mar 2023 02:47:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229817AbjCIHqu (ORCPT ); Thu, 9 Mar 2023 02:46:50 -0500 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B942DDF22 for ; Wed, 8 Mar 2023 23:46:15 -0800 (PST) Received: by mail-lj1-x229.google.com with SMTP id h9so930910ljq.2 for ; Wed, 08 Mar 2023 23:46:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678347974; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/ycp1fOFRcqnvrXtuAswlNcdj2NkXI8qjDu7ztULp4g=; b=hfYUvbEJ/fIs0adm48Nn43F1+/5O7YPhYpEpE/GRRX2ZWZh6Gq+yCigTRjTLV/SkXN EpZ/VQupisd3fsrS7/H/gCFUoMeX5JGZkvaZ7xtzK4gRVZZ2UmkBx9v5BfV5eY5PQy3b sePtBA87IWZ8Ux7FBFpZ3wTFqe67boz1z867/kDMzJfoX82TaPRyMaelqKdFTikiOM8f rvPfgXQXjKPcVm9VeRxRb7H+zXL989U9EAzlfR2uqXTYXvu98NBxaLBdDuUmo7+Pilld 0o3IRXZp5dLbQpnnOVuSp/qIX+2Ys07bLCdGkAgj0vbmtMvdKNe58z8YxfFQTFgwozP1 Nw5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678347974; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/ycp1fOFRcqnvrXtuAswlNcdj2NkXI8qjDu7ztULp4g=; b=JolLYm9vkLJ/jA6872E+KXRihJtjGUP+4u91qA6ijXSJLBGqKSApNyGXViWdXBUvnN NswX7j95dKRU5sW85qymS1oHrI3dfyXdo7ZrB4V73BE7tFZyMeuBZTZZBkydtm1fBskm /k5HathP/hkmRtbBY8J19P3MZSL7YjVdyi38n2FcSFvVRj9W2nYsmZGjiHSyvBr7qLt1 RScZypur131BaQJ/acEGDHaGfAgTCNkDfOrZwdan7+KSTuOwEMEH3VKsLwfYPYKD/X6B ZGHmMTV9fymx7KGuM2cKbYcGi6E9SLKXtvlebw87DxHPkI7szIprWx4XejTsSPuSRhS+ kmfw== X-Gm-Message-State: AO0yUKUEYQjqyHodpmI1VuCDfsG0NM2kWFaBYMG3iE+YcVI5QZcEl4C7 +5eUx/W7riebVNdwDPVuQPztfQ== X-Received: by 2002:a05:651c:88:b0:293:3dd6:89a4 with SMTP id 8-20020a05651c008800b002933dd689a4mr6194273ljq.34.1678347973846; Wed, 08 Mar 2023 23:46:13 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id a6-20020a056512020600b004bb766e01a4sm2568972lfo.245.2023.03.08.23.46.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 23:46:13 -0800 (PST) From: Linus Walleij Date: Thu, 09 Mar 2023 08:46:05 +0100 Subject: [PATCH v3 17/17] gpio: pcie-idio-24: Convert to immutable irq_chip MIME-Version: 1.0 Message-Id: <20230215-immutable-chips-v3-17-972542092a77@linaro.org> References: <20230215-immutable-chips-v3-0-972542092a77@linaro.org> In-Reply-To: <20230215-immutable-chips-v3-0-972542092a77@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759875699138066338?= X-GMAIL-MSGID: =?utf-8?q?1759875699138066338?= Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Acked-by: William Breathitt Gray Acked-by: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pcie-idio-24.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c index 8a9b98fa418f..ac42150f4009 100644 --- a/drivers/gpio/gpio-pcie-idio-24.c +++ b/drivers/gpio/gpio-pcie-idio-24.c @@ -396,6 +396,8 @@ static void idio_24_irq_mask(struct irq_data *data) } raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); + + gpiochip_disable_irq(chip, irqd_to_hwirq(data)); } static void idio_24_irq_unmask(struct irq_data *data) @@ -408,6 +410,8 @@ static void idio_24_irq_unmask(struct irq_data *data) const unsigned long bank_offset = bit_offset / 8; unsigned char cos_enable_state; + gpiochip_enable_irq(chip, irqd_to_hwirq(data)); + raw_spin_lock_irqsave(&idio24gpio->lock, flags); prev_irq_mask = idio24gpio->irq_mask >> bank_offset * 8; @@ -437,12 +441,14 @@ static int idio_24_irq_set_type(struct irq_data *data, unsigned int flow_type) return 0; } -static struct irq_chip idio_24_irqchip = { +static const struct irq_chip idio_24_irqchip = { .name = "pcie-idio-24", .irq_ack = idio_24_irq_ack, .irq_mask = idio_24_irq_mask, .irq_unmask = idio_24_irq_unmask, - .irq_set_type = idio_24_irq_set_type + .irq_set_type = idio_24_irq_set_type, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; static irqreturn_t idio_24_irq_handler(int irq, void *dev_id) @@ -535,7 +541,7 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id) idio24gpio->chip.set_multiple = idio_24_gpio_set_multiple; girq = &idio24gpio->chip.irq; - girq->chip = &idio_24_irqchip; + gpio_irq_chip_set_chip(girq, &idio_24_irqchip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler = NULL; girq->num_parents = 0;