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[2620:137:e000::1:20]) by mx.google.com with ESMTP id n9-20020a634d49000000b004fcda251792si15664538pgl.201.2023.03.08.23.56.08; Wed, 08 Mar 2023 23:56:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dpeqQOhA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229968AbjCIHrH (ORCPT + 99 others); Thu, 9 Mar 2023 02:47:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230256AbjCIHqb (ORCPT ); Thu, 9 Mar 2023 02:46:31 -0500 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0892BDD366 for ; Wed, 8 Mar 2023 23:46:07 -0800 (PST) Received: by mail-lf1-x129.google.com with SMTP id d36so1141395lfv.8 for ; Wed, 08 Mar 2023 23:46:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678347966; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=mrWM+EAKAzwQ5ezMEftNhFMLDl9SqlbwY2w38EwevvI=; b=dpeqQOhAC2IXszdN6b8072Sl3bUiKHrw7h4NcCf0ogXh4B0yfqJj4ByencdTElx2aJ sKF4q5jllyoAmMUW1uRtjq8pRUmfXSCBbZVRrj3c2xQQ0x0vtVj7XokQal+UY9jqLosg Xx+05Ne3vk9lXNGwr8b/JGeQcueOHbwq5PWrmt9z39hSY2nGyWtfcKQRqCpZYWcY6wV4 JW6F/ONnjvJUwNtFnrrd2R099Hw9dktMpGsFvYioElhFKu6kHxEJVHQ5pqKTod0lk1v+ vuTU590mZUpAPXNWN4bYA6rqfMeoD8fC6xhG4fbLX/Sz+AO32D4l60l+nwuZPGTHP3AS dzyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678347966; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mrWM+EAKAzwQ5ezMEftNhFMLDl9SqlbwY2w38EwevvI=; b=SZmKbGIsQlGPrjYjPYZAAAGGq7FTLensYvqi3pY+eV2za3lz842JrNeDFb7e6Kojsb uUpiN2nZ0mN1O8ZNnX/58vgO7ECowBznQSave3hOUYKdVSZfhbAb1cnyj3xUMrJXqNzE GDyqGmvk8Rx35L6ErrQknQIx3OBQXnUtcxSlG22jksYZSPQDZ6xiIu6VaOGZHuQ8T+Pb 9dK1WmKSylGqLk483Qx9BZR5oKWhlUh1WZUsIPfOhg3EQVsHI0m1lJH/1DnVypvuX9FA sx6v2iU0z6UJB670SQC5w9/G2voXGsj/WCke0XQq4gxPRh5Bh3JRplxdLJTYLksDhkc7 x8nw== X-Gm-Message-State: AO0yUKUAQSzmPlvFCKejsGOXfe0oMXCqleaXoxXDQpQRmnPH5w+3pUKX 46v0jYq1gMH2Kg0e9uW9480Jig== X-Received: by 2002:ac2:555a:0:b0:4de:6973:82aa with SMTP id l26-20020ac2555a000000b004de697382aamr5913982lfk.68.1678347966337; Wed, 08 Mar 2023 23:46:06 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id a6-20020a056512020600b004bb766e01a4sm2568972lfo.245.2023.03.08.23.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 23:46:05 -0800 (PST) From: Linus Walleij Date: Thu, 09 Mar 2023 08:45:58 +0100 Subject: [PATCH v3 10/17] gpio: idt3243x: Convert to immutable irq_chip MIME-Version: 1.0 Message-Id: <20230215-immutable-chips-v3-10-972542092a77@linaro.org> References: <20230215-immutable-chips-v3-0-972542092a77@linaro.org> In-Reply-To: <20230215-immutable-chips-v3-0-972542092a77@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier , Thomas Bogendoerfer X-Mailer: b4 0.12.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759876073592369771?= X-GMAIL-MSGID: =?utf-8?q?1759876073592369771?= Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Tested-by: Thomas Bogendoerfer Acked-by: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/gpio/gpio-idt3243x.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-idt3243x.c b/drivers/gpio/gpio-idt3243x.c index 1cafdf46f875..00f547d26254 100644 --- a/drivers/gpio/gpio-idt3243x.c +++ b/drivers/gpio/gpio-idt3243x.c @@ -92,6 +92,8 @@ static void idt_gpio_mask(struct irq_data *d) writel(ctrl->mask_cache, ctrl->pic + IDT_PIC_IRQ_MASK); raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); + + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); } static void idt_gpio_unmask(struct irq_data *d) @@ -100,6 +102,7 @@ static void idt_gpio_unmask(struct irq_data *d) struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc); unsigned long flags; + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); raw_spin_lock_irqsave(&gc->bgpio_lock, flags); ctrl->mask_cache &= ~BIT(d->hwirq); @@ -119,12 +122,14 @@ static int idt_gpio_irq_init_hw(struct gpio_chip *gc) return 0; } -static struct irq_chip idt_gpio_irqchip = { +static const struct irq_chip idt_gpio_irqchip = { .name = "IDTGPIO", .irq_mask = idt_gpio_mask, .irq_ack = idt_gpio_ack, .irq_unmask = idt_gpio_unmask, - .irq_set_type = idt_gpio_irq_set_type + .irq_set_type = idt_gpio_irq_set_type, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; static int idt_gpio_probe(struct platform_device *pdev) @@ -168,7 +173,7 @@ static int idt_gpio_probe(struct platform_device *pdev) return parent_irq; girq = &ctrl->gc.irq; - girq->chip = &idt_gpio_irqchip; + gpio_irq_chip_set_chip(girq, &idt_gpio_irqchip); girq->init_hw = idt_gpio_irq_init_hw; girq->parent_handler = idt_gpio_dispatch; girq->num_parents = 1;