Message ID | 20230214143720.2416762-13-konrad.dybcio@linaro.org |
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State | New |
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[83.9.1.117]) by smtp.gmail.com with ESMTPSA id eg21-20020a056402289500b004acb6189693sm5378052edb.83.2023.02.14.06.38.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 06:38:14 -0800 (PST) From: Konrad Dybcio <konrad.dybcio@linaro.org> To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org Cc: marijn.suijten@somainline.org, Konrad Dybcio <konrad.dybcio@linaro.org>, Georgi Djakov <djakov@kernel.org>, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 12/12] interconnect: qcom: icc-rpm: Allow negative QoS offset Date: Tue, 14 Feb 2023 15:37:20 +0100 Message-Id: <20230214143720.2416762-13-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230214143720.2416762-1-konrad.dybcio@linaro.org> References: <20230214143720.2416762-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757818035614003371?= X-GMAIL-MSGID: =?utf-8?q?1757818035614003371?= |
Series |
[v4,01/12] interconnect: qcom: rpm: make QoS INVALID default, separate out driver data
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Commit Message
Konrad Dybcio
Feb. 14, 2023, 2:37 p.m. UTC
In some very very very very unfortunate cases, the correct offset of
the QoS registers will be.. negative. One such case is MSM8998, where
The DDR BWMON occupies what-would-be-the-BIMC-base which we usually
take into account with the register calculation, making the actual
BIMC node start at what-would-be-the-BIMC-base+0x300.
In order to keep the calculation code sane, the simplest - however
ugly it may be - solution is to allow the offset to be negative.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
drivers/interconnect/qcom/icc-rpm.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Comments
On 14/02/2023 16:37, Konrad Dybcio wrote: > In some very very very very unfortunate cases, the correct offset of > the QoS registers will be.. negative. One such case is MSM8998, where > The DDR BWMON occupies what-would-be-the-BIMC-base which we usually > take into account with the register calculation, making the actual > BIMC node start at what-would-be-the-BIMC-base+0x300. > > In order to keep the calculation code sane, the simplest - however > ugly it may be - solution is to allow the offset to be negative. I'm not sure how does this work, as e.g. qcom_icc_set_qnoc_qos() will try to access an address before the first register. Most probably this patch should go together with the rest of msm8998 patches. A slightly better solution to making qos_offset negative might be to make bwmon a child node of the icc. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > drivers/interconnect/qcom/icc-rpm.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h > index 77e263b93c27..5e4215f25c2e 100644 > --- a/drivers/interconnect/qcom/icc-rpm.h > +++ b/drivers/interconnect/qcom/icc-rpm.h > @@ -39,7 +39,7 @@ struct qcom_icc_provider { > int num_intf_clks; > enum qcom_icc_type type; > struct regmap *regmap; > - unsigned int qos_offset; > + int qos_offset; > u64 bus_clk_rate[2]; > bool keep_alive; > struct clk_bulk_data bus_clks[2]; > @@ -105,7 +105,7 @@ struct qcom_icc_desc { > bool keep_alive; > enum qcom_icc_type type; > const struct regmap_config *regmap_cfg; > - unsigned int qos_offset; > + int qos_offset; > }; > > /* Valid for all bus types */
On 15.02.2023 02:16, Dmitry Baryshkov wrote: > On 14/02/2023 16:37, Konrad Dybcio wrote: >> In some very very very very unfortunate cases, the correct offset of >> the QoS registers will be.. negative. One such case is MSM8998, where >> The DDR BWMON occupies what-would-be-the-BIMC-base which we usually >> take into account with the register calculation, making the actual >> BIMC node start at what-would-be-the-BIMC-base+0x300. >> >> In order to keep the calculation code sane, the simplest - however >> ugly it may be - solution is to allow the offset to be negative. > > I'm not sure how does this work, as e.g. qcom_icc_set_qnoc_qos() will try to access an address before the first register. Most probably this patch should go together with the rest of msm8998 patches. In our case BIMC is the offender and its defines all base on M_BKE_REG_BASE(n) (0x300 + (0x4000 * n)), so removing 0x300 is perfectly ok. > > A slightly better solution to making qos_offset negative might be to make bwmon a child node of the icc. That sounds like a lot of complex changes and accounting for old / different DTs who don't have the bwmon as a child of icc :/ Konrad > >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> --- >> drivers/interconnect/qcom/icc-rpm.h | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h >> index 77e263b93c27..5e4215f25c2e 100644 >> --- a/drivers/interconnect/qcom/icc-rpm.h >> +++ b/drivers/interconnect/qcom/icc-rpm.h >> @@ -39,7 +39,7 @@ struct qcom_icc_provider { >> int num_intf_clks; >> enum qcom_icc_type type; >> struct regmap *regmap; >> - unsigned int qos_offset; >> + int qos_offset; >> u64 bus_clk_rate[2]; >> bool keep_alive; >> struct clk_bulk_data bus_clks[2]; >> @@ -105,7 +105,7 @@ struct qcom_icc_desc { >> bool keep_alive; >> enum qcom_icc_type type; >> const struct regmap_config *regmap_cfg; >> - unsigned int qos_offset; >> + int qos_offset; >> }; >> /* Valid for all bus types */ >
diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 77e263b93c27..5e4215f25c2e 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -39,7 +39,7 @@ struct qcom_icc_provider { int num_intf_clks; enum qcom_icc_type type; struct regmap *regmap; - unsigned int qos_offset; + int qos_offset; u64 bus_clk_rate[2]; bool keep_alive; struct clk_bulk_data bus_clks[2]; @@ -105,7 +105,7 @@ struct qcom_icc_desc { bool keep_alive; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; - unsigned int qos_offset; + int qos_offset; }; /* Valid for all bus types */