Message ID | 20230213185218.166520-4-quic_molvera@quicinc.com |
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State | New |
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Mon, 13 Feb 2023 18:53:16 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 31DIrFfn006986 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 13 Feb 2023 18:53:15 GMT Received: from hu-molvera-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 13 Feb 2023 10:53:15 -0800 From: Melody Olvera <quic_molvera@quicinc.com> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Jassi Brar <jassisinghbrar@gmail.com>, Mathieu Poirier <mathieu.poirier@linaro.org>, Robert Marko <robimarko@gmail.com>, Guru Das Srinagesh <quic_gurus@quicinc.com> CC: Konrad Dybcio <konrad.dybcio@linaro.org>, Manivannan Sadhasivam <mani@kernel.org>, Melody Olvera <quic_molvera@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-remoteproc@vger.kernel.org> Subject: [PATCH 3/9] dt-bindings: soc: qcom: aoss: Document power-domain-cells for aoss Date: Mon, 13 Feb 2023 10:52:12 -0800 Message-ID: <20230213185218.166520-4-quic_molvera@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230213185218.166520-1-quic_molvera@quicinc.com> References: <20230213185218.166520-1-quic_molvera@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: cZuWaAhdJ1pGM4mdhElvOm8ssiEtgIY2 X-Proofpoint-ORIG-GUID: cZuWaAhdJ1pGM4mdhElvOm8ssiEtgIY2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-13_12,2023-02-13_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 malwarescore=0 mlxlogscore=999 phishscore=0 lowpriorityscore=0 bulkscore=0 mlxscore=0 adultscore=0 impostorscore=0 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302130165 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757743140778544025?= X-GMAIL-MSGID: =?utf-8?q?1757743140778544025?= |
Series |
remoteproc: qcom_q6v5_pas: Add support for QDU1000/QRU1000 mpss
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Commit Message
Melody Olvera
Feb. 13, 2023, 6:52 p.m. UTC
Document "#-power-domain-cells" field for aoss devices as required
by power-controller bindings.
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
---
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 4 ++++
1 file changed, 4 insertions(+)
Comments
On 13/02/2023 19:52, Melody Olvera wrote: > Document "#-power-domain-cells" field for aoss devices as required > by power-controller bindings. The power domain cells are for power domain providers. The reason to add them is because it is a power domain provider. Power-controller bindings do not require drivers which are not power controllers to become such... and this driver is not power domain provider / power controller, is it? > > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > --- > Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 4 ++++ > 1 file changed, 4 insertions(+) Best regards, Krzysztof
On Mon, Feb 13, 2023 at 10:52:12AM -0800, Melody Olvera wrote: > Document "#-power-domain-cells" field for aoss devices as required > by power-controller bindings. > 99512191f4f1 ("soc: qcom: aoss: Drop power domain support") was merged in v5.16, so I don't think this is correct. Please let me know if I'm misunderstood your intent. Thanks, Bjorn > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > --- > Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml > index ab607efbb64c..bcfa8e2e6a04 100644 > --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml > +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml > @@ -60,6 +60,9 @@ properties: > description: > The single clock represents the QDSS clock. > > + "#power-domain-cells": > + const: 1 > + > required: > - compatible > - reg > @@ -97,6 +100,7 @@ examples: > mboxes = <&apss_shared 0>; > > #clock-cells = <0>; > + #power-domain-cells = <1>; > > cx_cdev: cx { > #cooling-cells = <2>; > -- > 2.25.1 >
On 2/14/2023 9:52 AM, Bjorn Andersson wrote: > On Mon, Feb 13, 2023 at 10:52:12AM -0800, Melody Olvera wrote: >> Document "#-power-domain-cells" field for aoss devices as required >> by power-controller bindings. >> > 99512191f4f1 ("soc: qcom: aoss: Drop power domain support") was merged > in v5.16, so I don't think this is correct. Please let me know if I'm > misunderstood your intent. No, you're correct. Upon reviewing the that commit, this change is wrong and should be dropped. I need to update the device tree accordingly. Thanks for catching that. Thanks, Melody > > Thanks, > Bjorn > >> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> >> --- >> Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml >> index ab607efbb64c..bcfa8e2e6a04 100644 >> --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml >> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml >> @@ -60,6 +60,9 @@ properties: >> description: >> The single clock represents the QDSS clock. >> >> + "#power-domain-cells": >> + const: 1 >> + >> required: >> - compatible >> - reg >> @@ -97,6 +100,7 @@ examples: >> mboxes = <&apss_shared 0>; >> >> #clock-cells = <0>; >> + #power-domain-cells = <1>; >> >> cx_cdev: cx { >> #cooling-cells = <2>; >> -- >> 2.25.1 >>
On 2/14/2023 12:25 AM, Krzysztof Kozlowski wrote: > On 13/02/2023 19:52, Melody Olvera wrote: >> Document "#-power-domain-cells" field for aoss devices as required >> by power-controller bindings. > The power domain cells are for power domain providers. The reason to add > them is because it is a power domain provider. Power-controller bindings > do not require drivers which are not power controllers to become such... > and this driver is not power domain provider / power controller, is it? You're correct; I didn't realize. I'll drop this patch. Thanks, Melody > >> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> >> --- >> Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 4 ++++ >> 1 file changed, 4 insertions(+) > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml index ab607efbb64c..bcfa8e2e6a04 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml @@ -60,6 +60,9 @@ properties: description: The single clock represents the QDSS clock. + "#power-domain-cells": + const: 1 + required: - compatible - reg @@ -97,6 +100,7 @@ examples: mboxes = <&apss_shared 0>; #clock-cells = <0>; + #power-domain-cells = <1>; cx_cdev: cx { #cooling-cells = <2>;