Message ID | 20230213143524.1943754-9-konrad.dybcio@linaro.org |
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State | New |
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[83.9.1.117]) by smtp.gmail.com with ESMTPSA id uz6-20020a170907118600b0088a2397cb2csm6927186ejb.143.2023.02.13.06.35.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Feb 2023 06:35:41 -0800 (PST) From: Konrad Dybcio <konrad.dybcio@linaro.org> To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio <konrad.dybcio@linaro.org>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, linux-kernel@vger.kernel.org Subject: [PATCH v2 8/9] soc: qcom: rpmpd: Hook up VDDMX as parent of SM6375 VDDGX Date: Mon, 13 Feb 2023 15:35:23 +0100 Message-Id: <20230213143524.1943754-9-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230213143524.1943754-1-konrad.dybcio@linaro.org> References: <20230213143524.1943754-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757727388428112095?= X-GMAIL-MSGID: =?utf-8?q?1757727388428112095?= |
Series |
[v2,1/9] soc: qcom: rpmpd: Bring all definitions to the top
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Commit Message
Konrad Dybcio
Feb. 13, 2023, 2:35 p.m. UTC
The GPU core clock requires that both VDDGX and VDDMX domains are scaled at the same rate at the same time (well, MX just before GX but you get the idea). Set MX as parent of GX to take care of that. Suggested-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/soc/qcom/rpmpd.c | 3 +++ 1 file changed, 3 insertions(+)
Comments
On 13.02.2023 15:35, Konrad Dybcio wrote: > The GPU core clock requires that both VDDGX and VDDMX domains are scaled > at the same rate at the same time (well, MX just before GX but you get > the idea). Set MX as parent of GX to take care of that. > > Suggested-by: Bjorn Andersson <andersson@kernel.org> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > drivers/soc/qcom/rpmpd.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c > index 2027c820caa7..2669c9210754 100644 > --- a/drivers/soc/qcom/rpmpd.c > +++ b/drivers/soc/qcom/rpmpd.c > @@ -216,11 +216,13 @@ static struct rpmpd gfx_s2b_vfc = { > .key = KEY_FLOOR_CORNER, > }; > > +static struct rpmpd mx_rwmx0_lvl; > static struct rpmpd gx_rwgx0_lvl_ao; > static struct rpmpd gx_rwgx0_lvl = { > .pd = { .name = "gx", }, > .peer = &gx_rwgx0_lvl_ao, > .res_type = RPMPD_RWGX, > + .parent = &mx_rwmx0_lvl.pd, > .res_id = 0, > .key = KEY_LEVEL, > }; > @@ -228,6 +230,7 @@ static struct rpmpd gx_rwgx0_lvl = { > static struct rpmpd gx_rwgx0_lvl_ao = { > .pd = { .name = "gx_ao", }, > .peer = &gx_rwgx0_lvl, > + .parent = &mx_rwmx0_lvl.pd, This should have been mx_rwmx0_lvl_ao.pd. Konrad > .active_only = true, > .res_type = RPMPD_RWGX, > .res_id = 0,
diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c index 2027c820caa7..2669c9210754 100644 --- a/drivers/soc/qcom/rpmpd.c +++ b/drivers/soc/qcom/rpmpd.c @@ -216,11 +216,13 @@ static struct rpmpd gfx_s2b_vfc = { .key = KEY_FLOOR_CORNER, }; +static struct rpmpd mx_rwmx0_lvl; static struct rpmpd gx_rwgx0_lvl_ao; static struct rpmpd gx_rwgx0_lvl = { .pd = { .name = "gx", }, .peer = &gx_rwgx0_lvl_ao, .res_type = RPMPD_RWGX, + .parent = &mx_rwmx0_lvl.pd, .res_id = 0, .key = KEY_LEVEL, }; @@ -228,6 +230,7 @@ static struct rpmpd gx_rwgx0_lvl = { static struct rpmpd gx_rwgx0_lvl_ao = { .pd = { .name = "gx_ao", }, .peer = &gx_rwgx0_lvl, + .parent = &mx_rwmx0_lvl.pd, .active_only = true, .res_type = RPMPD_RWGX, .res_id = 0,