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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h185-20020a636cc2000000b004f2bbbca525si10573259pgc.435.2023.02.12.19.38.59; Sun, 12 Feb 2023 19:39:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=g0kbqHpn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229588AbjBMDiZ (ORCPT + 99 others); Sun, 12 Feb 2023 22:38:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49136 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229489AbjBMDiN (ORCPT ); Sun, 12 Feb 2023 22:38:13 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4E5DCDC3; Sun, 12 Feb 2023 19:38:11 -0800 (PST) X-UUID: d2b688aeab4f11eda06fc9ecc4dadd91-20230213 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=83LxHn0KuLIOw5PeHj1B8xMXUMZvQjuTlPj32+8lR4s=; b=g0kbqHpnaUsFOA8IZXkOy4a3J9mb4ejy7cYRq3D56RsiXjkpgjEH9hfczzC0yjsCIoR8Q3PuaeBgMOMw6J/r4Zg3dyo5mI277GePmBgi5vOLh+KcajfGOZAiBHskIBfmewSutttDZHx+n5pjjpHdjtEOaRpKXcPM+BDyEUbfFEQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.19,REQID:c9a8aac3-d99e-42fd-9226-f6df99171d36,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.19,REQID:c9a8aac3-d99e-42fd-9226-f6df99171d36,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:885ddb2,CLOUDID:63823cf8-ff42-4fb0-b929-626456a83c14,B ulkID:230213113807YTWK3BYU,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-UUID: d2b688aeab4f11eda06fc9ecc4dadd91-20230213 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1738861086; Mon, 13 Feb 2023 11:38:04 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.194) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 13 Feb 2023 11:38:04 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 13 Feb 2023 11:38:04 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Tinghan Shen CC: , , , , , Subject: [PATCH v6 10/12] remoteproc: mediatek: Handle MT8195 SCP core 1 watchdog timeout Date: Mon, 13 Feb 2023 11:37:56 +0800 Message-ID: <20230213033758.16681-11-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230213033758.16681-1-tinghan.shen@mediatek.com> References: <20230213033758.16681-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757685534913795515?= X-GMAIL-MSGID: =?utf-8?q?1757685534913795515?= The MT8195 SCP core 1 watchdog timeout needs to be handled in the SCP core 0 IRQ handler because the MT8195 SCP core 1 watchdog timeout IRQ is wired on the same IRQ entry for core 0 watchdog timeout. MT8195 SCP has a watchdog status register to identify the watchdog timeout source when IRQ triggered. Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- drivers/remoteproc/mtk_common.h | 4 ++++ drivers/remoteproc/mtk_scp.c | 25 ++++++++++++++++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index 47c06882880c..7cba34462ece 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -55,6 +55,10 @@ #define MT8192_CORE0_WDT_IRQ 0x10030 #define MT8192_CORE0_WDT_CFG 0x10034 +#define MT8195_SYS_STATUS 0x4004 +#define MT8195_CORE0_WDT BIT(16) +#define MT8195_CORE1_WDT BIT(17) + #define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4) #define MT8195_CPU1_SRAM_PD 0x1084 diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 50eea0eb1fb9..ffb60190e0e3 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -229,6 +229,29 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp) } } +static void mt8195_scp_irq_handler(struct mtk_scp *scp) +{ + u32 scp_to_host; + + scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); + + if (scp_to_host & MT8192_SCP_IPC_INT_BIT) { + scp_ipi_handler(scp); + } else { + u32 reason = readl(scp->reg_base + MT8195_SYS_STATUS); + + if (reason & MT8195_CORE0_WDT) + writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ); + + if (reason & MT8195_CORE1_WDT) + writel(1, scp->reg_base + MT8195_CORE1_WDT_IRQ); + + scp_wdt_handler(scp, reason); + } + + writel(scp_to_host, scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); +} + static void mt8195_scp_c1_irq_handler(struct mtk_scp *scp) { u32 scp_to_host; @@ -1280,7 +1303,7 @@ static const struct mtk_scp_of_data mt8192_of_data = { static const struct mtk_scp_of_data mt8195_of_data = { .scp_clk_get = mt8195_scp_clk_get, .scp_before_load = mt8195_scp_before_load, - .scp_irq_handler = mt8192_scp_irq_handler, + .scp_irq_handler = mt8195_scp_irq_handler, .scp_reset_assert = mt8192_scp_reset_assert, .scp_reset_deassert = mt8192_scp_reset_deassert, .scp_stop = mt8195_scp_stop,