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Tue, 7 Feb 2023 00:09:45 -0600 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB06.amd.com (10.181.40.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 7 Feb 2023 00:09:45 -0600 Received: from xhdlakshmis40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Tue, 7 Feb 2023 00:09:41 -0600 From: Sai Krishna Potthuri To: Mark Brown , Tudor Ambarus , Pratyush Yadav , "Michael Walle" , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra CC: , , , , , Sai Krishna Potthuri Subject: [PATCH 2/3] mtd: spi-nor: Add and update device_id field in spi_mem structure Date: Tue, 7 Feb 2023 11:39:23 +0530 Message-ID: <20230207060924.265789-3-sai.krishna.potthuri@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207060924.265789-1-sai.krishna.potthuri@amd.com> References: <20230207060924.265789-1-sai.krishna.potthuri@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT100:EE_|PH7PR12MB7116:EE_ X-MS-Office365-Filtering-Correlation-Id: c44c8167-6a1e-451a-87a4-08db08d1e969 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Feb 2023 06:09:45.9470 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c44c8167-6a1e-451a-87a4-08db08d1e969 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT100.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7116 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757152865796969230?= X-GMAIL-MSGID: =?utf-8?q?1757152865796969230?= Xilinx Versal Octal SPI controller drivers might require the device id information to perform the Rx tuning operation. Since there is no common Tuning Data Pattern defined across all vendors, controllers which requires Rx tuning to find out the optimal sampling point for data lines, this device id information will be used as a golden data. spi-nor core updates the device id information in device_id field while reading the id of the flash device. Signed-off-by: Sai Krishna Potthuri --- drivers/mtd/spi-nor/core.c | 1 + include/linux/spi/spi-mem.h | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index bee8fc4c9f07..9811e74ef3b6 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1644,6 +1644,7 @@ static const struct flash_info *spi_nor_match_id(struct spi_nor *nor, if (part->id_len && !memcmp(part->id, id, part->id_len)) { nor->manufacturer = manufacturers[i]; + memcpy(nor->spimem->device_id, id, SPI_NOR_MAX_ID_LEN); return part; } } diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index 8e984d75f5b6..e9ae5c1b7391 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -181,11 +181,14 @@ struct spi_mem_dirmap_desc { void *priv; }; +#define SPI_MEM_DEV_MAX_ID_LEN 6 + /** * struct spi_mem - describes a SPI memory device * @spi: the underlying SPI device * @drvpriv: spi_mem_driver private data * @name: name of the SPI memory device + * @device_id: device id of the SPI memory device * * Extra information that describe the SPI memory device and may be needed by * the controller to properly handle this device should be placed here. @@ -197,6 +200,7 @@ struct spi_mem { struct spi_device *spi; void *drvpriv; const char *name; + u8 device_id[SPI_MEM_DEV_MAX_ID_LEN]; }; /**