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Thu, 21 Sep 2023 07:32:56 -0700 (PDT) From: Alexandre Mergnat Date: Thu, 21 Sep 2023 16:32:45 +0200 Subject: [PATCH v5 6/7] arm64: dts: mediatek: add larb support for mt8365 SoC MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v5-6-fa6f03680832@baylibre.com> References: <20230207-iommu-support-v5-0-fa6f03680832@baylibre.com> In-Reply-To: <20230207-iommu-support-v5-0-fa6f03680832@baylibre.com> To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Matthias Brugger , AngeloGioacchino Del Regno , Krzysztof Kozlowski , Conor Dooley Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2919; i=amergnat@baylibre.com; h=from:subject:message-id; bh=YQ4gFuFLZ3ZXhHJoLIMLvf6JGXdHrmuwZeJIyfaEitM=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBlDFQPhJHEHhv6HpHOR8vnZbdJqOs94UdeCDIGq9yk oP0A2XCJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZQxUDwAKCRArRkmdfjHURRxSD/ 95BCCUm6vXCQ3heLFsNf0wN6jPPVGGVQvyaRoSVnPA+qE1wmUMIJSJ3/Os+3vPTAaQKqRSSi5S4bps 3H/NTU8PqwL2g2f0cN1qjKrnvBdsVR5DJ40Nf10BqZZu1TZHYNIcM7vg3HmLTXFb+s+cbg8bQwjQJa j01l+vxGCArOiBpxCAyGyzACfTCTlFFGdaIxUc4H4wqUKD04624XV5ntBjTNthw2P+qzkDxXcx9nur iG2zXXUBFyIhzl38RYQIxvCsP5pw2KELEZGIkzxSayQ5L44xtSBjPOiTWbdY5XvprQFxU9wnnmWepl 7vwQSRnSrLz+OCv9MOzKCGroNm1IzNTrSdi0Za6+CD5+Q0yBwQkA0vUqoCf94y3R9wlDb3ZNoGGJIb bk2+P7zJHMCrEc/yDl6N2T/jG7cF5sLKBD+PympY8cfQHWeNXRWWShRXn09PQqB/gX5Nm79/Mzm57t omaDyWe3lrnXx1H2frtvyzr2Wf6nWbh0GD4zyKrl413WQgeXt5tcTPATFSY34QSXVPlNOU0SkRNz1p 58/Dlrb9QqA2LODi+/nhKZUzjT5EluaUYCBS2GpeeuytKTL9EAxx9tgvGOWrSlIqHcImowYIaY4Hs4 e3q3arOf4R4E/epzs7VxtO791cfKKfqRKw12rvXRk9Y2RIFwQPMqE73rPQ3Q== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Thu, 21 Sep 2023 12:44:51 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777681958376845646 X-GMAIL-MSGID: 1777681958376845646 Local arbiter (LARB) is a component of Smart Multimedia Interface (SMI), used to help the memory management (IOMMU). This patch add 4 LARBs and 2 clocks for the larb1 and larb3 support. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 59 ++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index a03b8c0da68b..afcfa1dd242e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -735,12 +735,71 @@ smi_common: smi@14002000 { power-domains = <&spm MT8365_POWER_DOMAIN_MM>; }; + larb0: larb@14003000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x14003000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_LARB0>, + <&mmsys CLK_MM_MM_SMI_LARB0>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; + mediatek,larb-id = <0>; + }; + camsys: syscon@15000000 { compatible = "mediatek,mt8365-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; #clock-cells = <1>; }; + larb2: larb@15001000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x15001000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_IMG>, + <&camsys CLK_CAM_LARB2>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + mediatek,larb-id = <2>; + }; + + vdecsys: syscon@16000000 { + compatible = "mediatek,mt8365-vdecsys", "syscon"; + reg = <0 0x16000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb3: larb@16010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x16010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vdecsys CLK_VDEC_LARB1>, + <&vdecsys CLK_VDEC_LARB1>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>; + mediatek,larb-id = <3>; + }; + + vencsys: syscon@17000000 { + compatible = "mediatek,mt8365-vencsys", "syscon"; + reg = <0 0x17000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb1: larb@17010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x17010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vencsys CLK_VENC>, <&vencsys CLK_VENC>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VENC>; + mediatek,larb-id = <1>; + }; + apu: syscon@19020000 { compatible = "mediatek,mt8365-apu", "syscon"; reg = <0 0x19020000 0 0x1000>;