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a=openpgp-sha256; l=4724; i=amergnat@baylibre.com; h=from:subject:message-id; bh=gs34qYbpVZeuz1fNLXc7xbInSDTbehayNY8q/g3uDQE=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBky3Yuxk3ppHTVskoqexjTkK+EC1B0pEDG+RJOQWCy OHthgxuJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZMt2LgAKCRArRkmdfjHURURaD/ 9110SUqOn4t8I75q0ja4UGGQhOX629Wt2AihGU2K8qbKmMcg/3VfzQ0PTat3HhrGR5TTAJHwGfI723 N1PvAFMQ3bRf7OV/+aNDdW2YqQBOz6NKklqpKuK1bib/OQk1rCt6lkp+OwsticsF/7Hs9R3CmFHR+l obV5678xnmbqwQkxwYTgQHWxEePhwWBxn9NSeMm6TswlsBSIaA0KTWf1cTKeKlKk6SSljRIcFuQBnD Cof/ng7LtBUJZ0aMsJbAECj6NWVdgTKVBHAqIBEeX2qWNMW+1dR9ZYcGwvUVaTgBnYAMS1+p/V0Po1 Et6pBbquLm2UFxJACNJKG0nkCAIgYHWypxG+EPkExG9N0yxsSXWUGVVPERU25p7jNokVp3B04mV1VO mDaykMnG7HVFtE+u6XdEhXgnzFoH1zElFh4RQeWScuemSs/fv1NZaqwfYD1QwrBtgj2OJACIu5nuJl V3+sxPYTMUU2xff7FbAKrYDEBB/SYxCtHybKlRg61wq4RKlO583LOJJNQIS1V84KkU0zMxJAm5r4gR OWdnN5+9actrzJIm6p46Qnier709S9J7m87eq6c8mDdbnNRFYV1K92QOrImUgYHWymOZrZNVhUKnsM HzKV5RaiZOe2V5UegYa0RBt7kQuQ5h7JreyFEFpcyXyDKjCZK4IpfS+o6J2Q== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773205809435461720 X-GMAIL-MSGID: 1773205809435461720 The following power domain are added to the SoC dts: - MM (MultiMedia) - CONN (Connectivity) - MFG (MFlexGraphics) - Audio - Cam (Camera) - DSP (Digital Signal Processor) - Vdec (Video decoder) - Venc (Video encoder) - APU (AI Processor Unit) Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 110 +++++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index c3ad7cbc89ab..c2f88d153dee 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8365"; @@ -298,6 +299,115 @@ syscfg_pctl: syscfg-pctl@10005000 { reg = <0 0x10005000 0 0x1000>; }; + scpsys: syscon@10006000 { + compatible = "mediatek,mt8365-syscfg", "syscon", "simple-mfd"; + reg = <0 0x10006000 0 0x1000>; + #power-domain-cells = <1>; + + /* System Power Manager */ + spm: power-controller { + compatible = "mediatek,mt8365-power-controller"; + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <1>; + + /* power domains of the SoC */ + power-domain@MT8365_POWER_DOMAIN_MM { + reg = ; + clocks = <&topckgen CLK_TOP_MM_SEL>, + <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMM0>, + <&mmsys CLK_MM_MM_SMI_COMM1>, + <&mmsys CLK_MM_MM_SMI_LARB0>; + clock-names = "mm", "mm-0", "mm-1", + "mm-2", "mm-3"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + mediatek,infracfg-nao = <&infracfg_nao>; + #address-cells = <1>; + #size-cells = <0>; + + power-domain@MT8365_POWER_DOMAIN_CAM { + reg = ; + clocks = <&camsys CLK_CAM_LARB2>, + <&camsys CLK_CAM_SENIF>, + <&camsys CLK_CAMSV0>, + <&camsys CLK_CAMSV1>, + <&camsys CLK_CAM_FDVT>, + <&camsys CLK_CAM_WPE>; + clock-names = "cam-0", "cam-1", + "cam-2", "cam-3", + "cam-4", "cam-5"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_VDEC { + reg = ; + #power-domain-cells = <0>; + }; + + power-domain@MT8365_POWER_DOMAIN_VENC { + reg = ; + #power-domain-cells = <0>; + }; + + power-domain@MT8365_POWER_DOMAIN_APU { + reg = ; + clocks = <&infracfg CLK_IFR_APU_AXI>, + <&apu CLK_APU_IPU_CK>, + <&apu CLK_APU_AXI>, + <&apu CLK_APU_JTAG>, + <&apu CLK_APU_IF_CK>, + <&apu CLK_APU_EDMA>, + <&apu CLK_APU_AHB>; + clock-names = "apu", "apu-0", + "apu-1", "apu-2", + "apu-3", "apu-4", + "apu-5"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + }; + + power-domain@MT8365_POWER_DOMAIN_CONN { + reg = ; + clocks = <&topckgen CLK_TOP_CONN_32K>, + <&topckgen CLK_TOP_CONN_26M>; + clock-names = "conn", "conn1"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_MFG { + reg = ; + clocks = <&topckgen CLK_TOP_MFG_SEL>; + clock-names = "mfg"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_AUDIO { + reg = ; + clocks = <&topckgen CLK_TOP_AUD_INTBUS_SEL>, + <&infracfg CLK_IFR_AUDIO>, + <&infracfg CLK_IFR_AUD_26M_BK>; + clock-names = "audio", "audio1", "audio2"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_DSP { + reg = ; + clocks = <&topckgen CLK_TOP_DSP_SEL>, + <&topckgen CLK_TOP_DSP_26M>; + clock-names = "dsp", "dsp1"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + }; + }; + watchdog: watchdog@10007000 { compatible = "mediatek,mt8365-wdt", "mediatek,mt6589-wdt"; reg = <0 0x10007000 0 0x100>;