From patchwork Mon Feb 6 01:44:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Rothwell X-Patchwork-Id: 52966 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp2002724wrn; Sun, 5 Feb 2023 17:46:11 -0800 (PST) X-Google-Smtp-Source: AK7set8z952qZEkcsJNPci548oxup08O7++ykyjpD18DCZdF5g0tqo7d5JP2XkKW9AvJPYmoHu6K X-Received: by 2002:a17:90b:d8b:b0:226:cdcf:da83 with SMTP id bg11-20020a17090b0d8b00b00226cdcfda83mr18768371pjb.46.1675647970934; Sun, 05 Feb 2023 17:46:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675647970; cv=none; d=google.com; s=arc-20160816; b=JF6xjA79/9I6zVSpNKFlvuJ/vdiWD8/VzXekRM4b3nTT7TxtPlbfx7GdfONVDprc6e /hnBavNTtypuJXA7bL+UuO9iQM8divYxsSfyVDVgXNqpeFmvUBcK9rI9i9hJT5NRjder ZH39hT4l9J/t0TAS5EXeMXpT3w69ZFILdDLLbyM75GqY35IJ3uSRCUWLEtJGaTpcNctN wbTFvi3HhJXQEz+5dAMJfSC5sIkPu7HWTwT2XXyZxPds+eBBCQQwFzrZE2TmuLWo209c T4xBZtROv09tpCeurhSxm4ZF3zCbTJg3NanoHKJNnHoM1vd5tGN7AHZt2zF7JhNw7JEa cwww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:subject:cc:to:from:date :dkim-signature; bh=CzV4pf5p8FlgcWCqtH6KBBJgrPVgee8EJCd9EengFhw=; b=UuC4NAiK3eXlY0RgEjsC9GtbOJrSp9a2yccYUrQF4NQ3cDUgO9hW7Uu9Aeq8iaAmok pfEGRKaQwxWjk0iuY8yi2FtYpDbWxE4lFReKrGuU3SeJP7x1n64+QYjtm48PL8YpHNZP ghRYuiwRnkS+QmXHrpFgXALPxRg2bKszJKCYOCuf1yVoctU5fd8BZqPqxW7/rEzRDenI OwHzkreycEeO08GSjuscfWGE1IyrJfRQNlhXLptuPS9vxrInI9VUoOdRnH77U3TlS1IH NWQNR9hWbV8IqLgTs7sfN7TNzlIu3HTyWtknQou/zz1M2frG16uxO4ypgS7aFrBArDiT ju2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@canb.auug.org.au header.s=201702 header.b=lWoH79UJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g15-20020a17090a578f00b0022c24bf1810si9239526pji.29.2023.02.05.17.45.58; Sun, 05 Feb 2023 17:46:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@canb.auug.org.au header.s=201702 header.b=lWoH79UJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229557AbjBFBpB (ORCPT + 99 others); Sun, 5 Feb 2023 20:45:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229448AbjBFBo7 (ORCPT ); Sun, 5 Feb 2023 20:44:59 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 45A7119F28; Sun, 5 Feb 2023 17:44:58 -0800 (PST) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P98Fw5dwLz4x1d; Mon, 6 Feb 2023 12:44:52 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canb.auug.org.au; s=201702; t=1675647893; bh=CzV4pf5p8FlgcWCqtH6KBBJgrPVgee8EJCd9EengFhw=; h=Date:From:To:Cc:Subject:From; b=lWoH79UJm0HxpmsUSKyF0xM9ly8TfHLeBvAYxMCetwOBpiMWuOyMlIEIBS1t8hCYU GEsEvhfLLpd91Anvqm0bzNsJk0m25/f+dRi8hEDMtl+UWoVrpKMPkNBxFdlW95PkZg AwkQoID0FXtujF9U+TaVDXyEgu0dn1dleM86jcaOgzOxZLqgdFqshNsknaw4qItm2w /4oTviSw33AieeA6gG0C64b4a1Evsp9gofYAB1YYJ9JeUaR4HrGVDRCUeLrAjPo06l ogUBxMGL7OEkpp8kRmIApZuBUzuJdVgbEqow6tGrxOro67PZe4aFXlLWVJ3vcB2e35 28vAmIbUx4+vw== Date: Mon, 6 Feb 2023 12:44:51 +1100 From: Stephen Rothwell To: Christoffer Dall , Marc Zyngier , Catalin Marinas , Will Deacon Cc: Linux Kernel Mailing List , Linux Next Mailing List , Mark Brown , Oliver Upton , Quentin Perret Subject: linux-next: manual merge of the kvm-arm tree with the arm64 tree Message-ID: <20230206124451.11532a04@canb.auug.org.au> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_MED,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757044246708199445?= X-GMAIL-MSGID: =?utf-8?q?1757044246708199445?= Hi all, Today's linux-next merge of the kvm-arm tree got a conflict in: arch/arm64/kernel/hyp-stub.S between commit: f122576f3533 ("arm64/sme: Enable host kernel to access ZT0") from the arm64 tree and commit: e2d4f5ae1771 ("KVM: arm64: Introduce finalise_el2_state macro") from the kvm-arm tree. I fixed it up (the code modified by the former was moved by the latter, so I applied the following merge fix patch) and can carry the fix as necessary. This is now fixed as far as linux-next is concerned, but any non trivial conflicts should be mentioned to your upstream maintainer when your tree is submitted for merging. You may also want to consider cooperating with the maintainer of the conflicting tree to minimise any particularly complex conflicts. I hope I got this right :-) From: Stephen Rothwell Date: Mon, 6 Feb 2023 12:40:16 +1100 Subject: [PATCH] fix up for "KVM: arm64: Introduce finalise_el2_state macro" interacting with "arm64/sme: Enable host kernel to access ZT0" Signed-off-by: Stephen Rothwell Signed-off-by: Stephen Rothwell --- arch/arm64/include/asm/el2_setup.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index 0bd6ed77e4a5..5f821e5c52a9 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -269,6 +269,12 @@ orr x0, x0, SMCR_ELx_FA64_MASK .Lskip_sme_fa64_\@: + // ZT0 available? + __check_override id_aa64smfr0 ID_AA64SMFR0_EL1_SMEver_SHIFT 4 .Linit_sme_zt0_\@ .Lskip_sme_zt0_\@ +.Linit_sme_zt0_\@: + orr x0, x0, SMCR_ELx_EZT0_MASK +.Lskip_sme_zt0_\@: + orr x0, x0, #SMCR_ELx_LEN_MASK // Enable full SME vector msr_s SYS_SMCR_EL2, x0 // length for EL1.