Message ID | 20230203130133.32901-2-kyarlagadda@nvidia.com |
---|---|
State | New |
Headers |
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Series |
Tegra TPM driver with hw flow control
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Commit Message
Krishna Yarlagadda
Feb. 3, 2023, 1:01 p.m. UTC
Tegra234 and Tegra241 devices have QSPI controller that supports TPM
devices. Since the controller only supports half duplex, sw wait polling
method implemented in tpm_tis_spi does not suffice. Wait polling as per
protocol is a hardware feature.
Add compatible for Tegra TPM driver with hardware flow control.
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
---
.../security/tpm/nvidia,tegra-tpm-spi.yaml | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.yaml
Comments
On Fri, Feb 3, 2023 at 7:02 AM Krishna Yarlagadda <kyarlagadda@nvidia.com> wrote: > Please use get_maintainers.pl. In particular, resend to DT list so automated checks work. > Tegra234 and Tegra241 devices have QSPI controller that supports TPM > devices. Since the controller only supports half duplex, sw wait polling > method implemented in tpm_tis_spi does not suffice. Wait polling as per > protocol is a hardware feature. > > Add compatible for Tegra TPM driver with hardware flow control. > > Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> > --- > .../security/tpm/nvidia,tegra-tpm-spi.yaml | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > create mode 100644 Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.yaml > > diff --git a/Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.yaml b/Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.yaml > new file mode 100644 > index 000000000000..dcb78db7355c > --- /dev/null > +++ b/Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.yaml > @@ -0,0 +1,34 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/security/tpm/nvidia,tegra-tpm-spi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Tegra QSPI TPM driver Bindings are for h/w, not drivers. > + > +maintainers: > + - Thierry Reding <thierry.reding@gmail.com> > + - Jonathan Hunter <jonathanh@nvidia.com> > + > +properties: > + compatible: > + enum: > + - nvidia,tegra-tpm-spi > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +unevaluatedProperties: false > + > +examples: > + - | > + qspi1@3250000 { spi@... > + tpm@0 { > + compatible = "nvidia,tegra-tpm-spi"; Tegra has a TPM chip/block? This doesn't seem right. > + reg = <0>; > + }; > + }; > -- > 2.17.1 >
diff --git a/Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.yaml b/Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.yaml new file mode 100644 index 000000000000..dcb78db7355c --- /dev/null +++ b/Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/security/tpm/nvidia,tegra-tpm-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Tegra QSPI TPM driver + +maintainers: + - Thierry Reding <thierry.reding@gmail.com> + - Jonathan Hunter <jonathanh@nvidia.com> + +properties: + compatible: + enum: + - nvidia,tegra-tpm-spi + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + qspi1@3250000 { + tpm@0 { + compatible = "nvidia,tegra-tpm-spi"; + reg = <0>; + }; + };