[v3,1/3] dt-bindings: mmc: Add StarFive MMC module
Commit Message
Add documentation to describe StarFive designware mobile storage
host controller driver.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
---
.../bindings/mmc/starfive,jh7110-mmc.yaml | 77 +++++++++++++++++++
1 file changed, 77 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml
Comments
On 03/02/2023 09:19, William Qiu wrote:
> Add documentation to describe StarFive designware mobile storage
> host controller driver.
>
> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> ---
> .../bindings/mmc/starfive,jh7110-mmc.yaml | 77 +++++++++++++++++++
> 1 file changed, 77 insertions(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
new file mode 100644
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/starfive,jh7110-mmc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive Designware Mobile Storage Host Controller
+
+description:
+ StarFive uses the Synopsys designware mobile storage host controller
+ to interface a SoC with storage medium such as eMMC or SD/MMC cards.
+
+allOf:
+ - $ref: synopsys-dw-mshc-common.yaml#
+
+maintainers:
+ - William Qiu <william.qiu@starfivetech.com>
+
+properties:
+ compatible:
+ const: starfive,jh7110-mmc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: biu clock
+ - description: ciu clock
+
+ clock-names:
+ items:
+ - const: biu
+ - const: ciu
+
+ interrupts:
+ maxItems: 1
+
+ starfive,sysreg:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to System Register Controller syscon node
+ - description: offset of SYS_SYSCONSAIF__SYSCFG register for MMC controller
+ - description: shift of SYS_SYSCONSAIF__SYSCFG register for MMC controller
+ - description: mask of SYS_SYSCONSAIF__SYSCFG register for MMC controller
+ description:
+ Should be four parameters, the phandle to System Register Controller
+ syscon node and the offset/shift/mask of SYS_SYSCONSAIF__SYSCFG register
+ for MMC controller.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - starfive,sysreg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ mmc@16010000 {
+ compatible = "starfive,jh7110-mmc";
+ reg = <0x16010000 0x10000>;
+ clocks = <&syscrg 91>,
+ <&syscrg 93>;
+ clock-names = "biu","ciu";
+ resets = <&syscrg 64>;
+ reset-names = "reset";
+ interrupts = <74>;
+ fifo-depth = <32>;
+ fifo-watermark-aligned;
+ data-addr = <0>;
+ starfive,sysreg = <&sysreg 0x14 0x1a 0x7c000000>;
+ };