From patchwork Fri Feb 3 08:17:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 52397 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp709976wrn; Fri, 3 Feb 2023 00:19:35 -0800 (PST) X-Google-Smtp-Source: AK7set/c2SZ4Kg6skQLNC2u9XbwHktoeoxaLuNCMYSNPIEN/9rgX+vVjFtZ52PI80YOf1GCLCx6O X-Received: by 2002:a05:6a20:7f8b:b0:b8:499d:7c9b with SMTP id d11-20020a056a207f8b00b000b8499d7c9bmr13551608pzj.51.1675412374695; Fri, 03 Feb 2023 00:19:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675412374; cv=none; d=google.com; s=arc-20160816; b=QJjDuU1XElRAHy5+TZtzKRY8wGHn82rPoR3HH0FYEJd5hiUvpbn0j51NqCVZNqSZCf 5x/9buyTEcKwwfMbxY1CfAs3kTfeS3/J3/f3D2S4I169yGT7N/XoPOoycIbyhwXtvC7s Trah19gEh/YMkEVb5UKaJDnVgoLPbGh/cfn1pItVOGVwie190JErTiAQFYqV9n5Sz/H1 J/tRqwPdVahyA5TUb+vnWSM3DGSVwV8ylBw6o09wQhkMS2M62+YI8RpMQnKN+A4I9Ey+ TK2LZyNXuHPB5cYSa1X6mCOI1avFOJZ0kBxC+c72QA/+e95nhCogfVRI6ZpkA9jo5h1z vYEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zNtzL2PidiHeTO8PSCaciTRS6LMZPNwWvdMtS6uNAYc=; b=hXAq2dg4NNDnM++tmn6+94vvpI3b+N+oKMJHfaoxd5tp4UzLODQrMnkopYIi8dfW8T G/Rk62lMa66qP0j6ethdXBAb2isywfShGjdDhMYu4Ry7YsPLVpO8U+jAmqZAGaOYN6Rb 7ruWISmVORVLtJVlo2YqxggXGiW3RiS79zMS6fAjCEXpFewSnpbe5xAnhR71r6PtummE WMcKrvbResUvZbKjvTYrIKX492wGSl5LvZ/D+GPffW57l7DKBBsMK532Kd73Y42EphWH uyE5ivNd1Vod+W0tnPIs1+jWjbNpXSzo/OEBATzM2G4+9jAtYgYSK8DxTXlWRYKdpewO q7fg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cS0hH6VY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g15-20020a63ad0f000000b004e03d6859f1si1941551pgf.289.2023.02.03.00.19.22; Fri, 03 Feb 2023 00:19:34 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cS0hH6VY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232790AbjBCISt (ORCPT + 99 others); Fri, 3 Feb 2023 03:18:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232401AbjBCISV (ORCPT ); Fri, 3 Feb 2023 03:18:21 -0500 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 411FF23317 for ; Fri, 3 Feb 2023 00:18:19 -0800 (PST) Received: by mail-wm1-x333.google.com with SMTP id bg26so3265925wmb.0 for ; Fri, 03 Feb 2023 00:18:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zNtzL2PidiHeTO8PSCaciTRS6LMZPNwWvdMtS6uNAYc=; b=cS0hH6VYYC3sHt99NaWopWGg8GGD7JG6ovgnCdmem75myJRxLbW70C3SQyJAfJtAss MtKb5/zta0HUvNQsAWNF5KmgmKvqQs4EtgscWExDHa/LQN2AKgt2JtTLKYq/CnurdBb+ 7A3conLnnSld2T/RwmJaYhcpnlB2RWBATQM3QexnSVsXgkog6VN1Qp1HV0jgC/jyXSrn 8I9O48YjsctOrBCiJcHCJXZlLp5E/AlKCRAUapVgcyyBkfzQAEeSeV6+i0pPGljwJMnT kh4rpTNo2eGykRswFcXHSo9sQm7AU1wRgi91XcH70yQT4rbUa6AsdJNFX8NDY9Y887Av ipyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zNtzL2PidiHeTO8PSCaciTRS6LMZPNwWvdMtS6uNAYc=; b=l5vY7NZqxN+Ec221Nmc14D+BSmccFH7fLgYtXX+Zrsg2vKJGeWcwKdeDaTHfQSSdYl oMRqD+HoCHugkSzXWS5QHMWkp85lIvCjm7F/DwbNMywkei+blZkikdUuuBOZ5Xagbbbg tQ3YXE1NUC7nDSHO+XYdIDHPNPs96YC4/MczRq0hf3nRYccizAcGHPSCP2WzIjiAjc7I YphJ1en+eOK1CXHasWnrip6Pv3vZ83AXwL5OrHrdIZMRqRyTEnM6POrwFVXiBk9rOiFo ystVi+SVm0SuDdyAJ8ltIWUnVkXq7zNz2usLxoSiICA0KBnZbRTzMdvtcMpfkn4dGdUS lIgQ== X-Gm-Message-State: AO0yUKVsTnnrlHe3ozZMtx9K0mMAHAHtjxB6aoRxgH8enZM4NtAjEnc2 ezp5u9VQohWCXo85Ayk4Rw+mUQ== X-Received: by 2002:a05:600c:3d8d:b0:3df:9858:c035 with SMTP id bi13-20020a05600c3d8d00b003df9858c035mr3637545wmb.10.1675412298631; Fri, 03 Feb 2023 00:18:18 -0800 (PST) Received: from hackbox.lan ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id az24-20020a05600c601800b003dc4baaedd3sm7316591wmb.37.2023.02.03.00.18.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Feb 2023 00:18:18 -0800 (PST) From: Abel Vesa To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Lorenzo Pieralisi , "vkoul@kernel.org" , Kishon Vijay Abraham I , Manivannan Sadhasivam , Johan Hovold Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , Dmitry Baryshkov Subject: [PATCH v7 04/12] phy: qcom-qmp: pcs-pcie: Add v6 register offsets Date: Fri, 3 Feb 2023 10:17:59 +0200 Message-Id: <20230203081807.2248625-5-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203081807.2248625-1-abel.vesa@linaro.org> References: <20230203081807.2248625-1-abel.vesa@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756797206295888874?= X-GMAIL-MSGID: =?utf-8?q?1756797206295888874?= The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new PCS PCIE specific offsets in a dedicated header file. Signed-off-by: Abel Vesa Reviewed-by: Dmitry Baryshkov --- This patchset relies on the following patchset: https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/ The v6 of this patch is: https://lore.kernel.org/all/20230202123902.3831491-5-abel.vesa@linaro.org/ Changes since v6: * none Changes since v5: * none Changes since v4: * none Changes since v3: * added Dmitry's R-b tag Changes since v2: * none Changes since v1: * split all the offsets into separate patches, like Vinod suggested drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 1 + drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h | 15 +++++++++++++++ 2 files changed, 16 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 0e7aaff2ecfd..05b59f261999 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -29,6 +29,7 @@ #include "phy-qcom-qmp-pcs-pcie-v4_20.h" #include "phy-qcom-qmp-pcs-pcie-v5.h" #include "phy-qcom-qmp-pcs-pcie-v5_20.h" +#include "phy-qcom-qmp-pcs-pcie-v6.h" #include "phy-qcom-qmp-pcie-qhp.h" /* QPHY_SW_RESET bit */ diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h new file mode 100644 index 000000000000..91e70002eb47 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_PCS_PCIE_V6_H_ +#define QCOM_PHY_QMP_PCS_PCIE_V6_H_ + +/* Only for QMP V6 PHY - PCIE have different offsets than V5 */ +#define QPHY_PCIE_V6_PCS_PCIE_POWER_STATE_CONFIG2 0x0c +#define QPHY_PCIE_V6_PCS_PCIE_POWER_STATE_CONFIG4 0x14 +#define QPHY_PCIE_V6_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x20 +#define QPHY_PCIE_V6_PCS_PCIE_OSC_DTCT_ACTIONS 0x94 + +#endif