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From: Janne Grunau <j@jannau.net>
To: Hector Martin <marcan@marcan.st>, Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
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Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 06/17] dt-bindings: arm-pmu: Add PMU compatible strings for
Apple M2 cores
Date: Sun, 12 Feb 2023 16:41:16 +0100
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|
| Series |
Device trees for Apple M2 (t8112) based devices
|
|
Commit Message
Janne Grunau
Feb. 12, 2023, 3:41 p.m. UTC
The PMUs on the avalanche and blizzard CPU two micro-architectures are
mostly compatible with M1 ones. They miss support for a single counter
according to Apple's PMU counter list.
Signed-off-by: Janne Grunau <j@jannau.net>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
The necessary driver update will be sent separately.
---
Documentation/devicetree/bindings/arm/pmu.yaml | 2 ++
1 file changed, 2 insertions(+)
Comments
On 12/02/2023 16:41, Janne Grunau wrote: > The PMUs on the avalanche and blizzard CPU two micro-architectures are > mostly compatible with M1 ones. They miss support for a single counter > according to Apple's PMU counter list. > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index dbb6f3dc5ae5..e14358bf0b9c 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -20,6 +20,8 @@ properties: items: - enum: - apm,potenza-pmu + - apple,avalanche-pmu + - apple,blizzard-pmu - apple,firestorm-pmu - apple,icestorm-pmu - arm,armv8-pmuv3 # Only for s/w models