Message ID | 20230201183626.351211-3-konrad.dybcio@linaro.org |
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State | New |
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[83.9.31.20]) by smtp.gmail.com with ESMTPSA id t13-20020a50d70d000000b00458b41d9460sm10297508edi.92.2023.02.01.10.36.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Feb 2023 10:36:33 -0800 (PST) From: Konrad Dybcio <konrad.dybcio@linaro.org> To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio <konrad.dybcio@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 02/10] clk: qcom: branch: Add helper functions for setting SLEEP/WAKE bits Date: Wed, 1 Feb 2023 19:36:18 +0100 Message-Id: <20230201183626.351211-3-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230201183626.351211-1-konrad.dybcio@linaro.org> References: <20230201183626.351211-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756654912287321047?= X-GMAIL-MSGID: =?utf-8?q?1756654912287321047?= |
Series |
[v5,01/10] clk: qcom: branch: Add helper functions for setting retain bits
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Commit Message
Konrad Dybcio
Feb. 1, 2023, 6:36 p.m. UTC
HLOS-controlled branch clocks on non-ancient Qualcomm platforms
feature SLEEP and WAKE fields which can be written to to configure
how long the clock hardware should wait internally before being
(un)gated. Some very sensitive clocks need to have these values
programmed to prevent putting the hardware in a not-exactly-good
state. Add definitions of these fields and introduce helpers for
setting them inside clock drivers.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
v4 -> v5:
- Introduce helpers that shift the value for you
drivers/clk/qcom/clk-branch.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
Comments
Hi Konrad, I love your patch! Yet something to improve: [auto build test ERROR on clk/clk-next] [also build test ERROR on linus/master v6.2-rc6] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Konrad-Dybcio/clk-qcom-branch-Add-helper-functions-for-setting-SLEEP-WAKE-bits/20230202-033712 base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next patch link: https://lore.kernel.org/r/20230201183626.351211-3-konrad.dybcio%40linaro.org patch subject: [PATCH v5 02/10] clk: qcom: branch: Add helper functions for setting SLEEP/WAKE bits config: arm-randconfig-r013-20230204 (https://download.01.org/0day-ci/archive/20230204/202302041929.36wT4EUe-lkp@intel.com/config) compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 4196ca3278f78c6e19246e54ab0ecb364e37d66a) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm cross compiling tool for clang build # apt-get install binutils-arm-linux-gnueabi # https://github.com/intel-lab-lkp/linux/commit/abd8a21fce6fafe4998281709f574b94b6c87031 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Konrad-Dybcio/clk-qcom-branch-Add-helper-functions-for-setting-SLEEP-WAKE-bits/20230202-033712 git checkout abd8a21fce6fafe4998281709f574b94b6c87031 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/clk/ If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from drivers/clk/qcom/gcc-apq8084.c:24: >> drivers/clk/qcom/clk-branch.h:71:7: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] FIELD_PREP(CBCR_WAKEUP, val)); ^ drivers/clk/qcom/clk-branch.h:77:7: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] FIELD_PREP(CBCR_SLEEP, val)); ^ 2 errors generated. vim +/FIELD_PREP +71 drivers/clk/qcom/clk-branch.h 67 68 static inline void qcom_branch_set_wakeup(struct regmap *regmap, struct clk_branch clk, u32 val) 69 { 70 regmap_update_bits(regmap, clk.halt_reg, CBCR_WAKEUP, > 71 FIELD_PREP(CBCR_WAKEUP, val)); 72 } 73
diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index 55b3a2c3afed..fa90e150853b 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -41,6 +41,8 @@ struct clk_branch { #define CBCR_FORCE_MEM_CORE_ON BIT(14) #define CBCR_FORCE_MEM_PERIPH_ON BIT(13) #define CBCR_FORCE_MEM_PERIPH_OFF BIT(12) +#define CBCR_WAKEUP GENMASK(11, 8) +#define CBCR_SLEEP GENMASK(7, 4) static inline void qcom_branch_set_force_mem_core(struct regmap *regmap, struct clk_branch clk, bool on) @@ -63,6 +65,18 @@ static inline void qcom_branch_set_force_periph_off(struct regmap *regmap, on ? CBCR_FORCE_MEM_PERIPH_OFF : 0); } +static inline void qcom_branch_set_wakeup(struct regmap *regmap, struct clk_branch clk, u32 val) +{ + regmap_update_bits(regmap, clk.halt_reg, CBCR_WAKEUP, + FIELD_PREP(CBCR_WAKEUP, val)); +} + +static inline void qcom_branch_set_sleep(struct regmap *regmap, struct clk_branch clk, u32 val) +{ + regmap_update_bits(regmap, clk.halt_reg, CBCR_SLEEP, + FIELD_PREP(CBCR_SLEEP, val)); +} + extern const struct clk_ops clk_branch_ops; extern const struct clk_ops clk_branch2_ops; extern const struct clk_ops clk_branch_simple_ops;