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[83.9.31.20]) by smtp.gmail.com with ESMTPSA id o13-20020a056402038d00b0049622a61f8fsm5681364edv.30.2023.01.31.16.09.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Jan 2023 16:09:04 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Catalin Marinas , Will Deacon , Marc Zyngier , James Morse , D Scott Phillips , Michal Orzel , Linu Cherian , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] arm64: Add a couple of missing part numbers Date: Wed, 1 Feb 2023 01:09:00 +0100 Message-Id: <20230201000900.3150295-1-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756567149081591783?= X-GMAIL-MSGID: =?utf-8?q?1756585965331739208?= Add Cortex X1C and add/clarify various recent Qualcomm Kryo cores, which almost exclusively mimic ARM IDs nowadays. Signed-off-by: Konrad Dybcio --- v1 -> v2: - Don't change the name of QCOM_CPU_PART_KRYO_4XX_SILVER arch/arm64/include/asm/cputype.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 683ca3af4084..a4260d3194fc 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -84,6 +84,7 @@ #define ARM_CPU_PART_CORTEX_X2 0xD48 #define ARM_CPU_PART_NEOVERSE_N2 0xD49 #define ARM_CPU_PART_CORTEX_A78C 0xD4B +#define ARM_CPU_PART_CORTEX_X1C 0xD4C #define APM_CPU_PART_POTENZA 0x000 @@ -107,9 +108,17 @@ #define QCOM_CPU_PART_KRYO 0x200 #define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800 #define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801 +#define QCOM_CPU_PART_KRYO_3XX_GOLD 0x802 #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 #define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804 #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 +#define QCOM_CPU_PART_KRYO_5XX_GOLD ARM_CPU_PART_CORTEX_A77 +#define QCOM_CPU_PART_KRYO_6XX_GOLD ARM_CPU_PART_CORTEX_A78 +#define QCOM_CPU_PART_KRYO_6XX_GOLDPLUS ARM_CPU_PART_CORTEX_X1 +#define QCOM_CPU_PART_KRYO_6XX_SILVER_V1 ARM_CPU_PART_CORTEX_A55 +#define QCOM_CPU_PART_KRYO_7XX_GOLD ARM_CPU_PART_CORTEX_A710 +#define QCOM_CPU_PART_KRYO_7XX_GOLDPLUS ARM_CPU_PART_CORTEX_X2 +#define QCOM_CPU_PART_KRYO_7XX_SILVER ARM_CPU_PART_CORTEX_A510 #define NVIDIA_CPU_PART_DENVER 0x003 #define NVIDIA_CPU_PART_CARMEL 0x004