Message ID | 20230130154823.117542-2-ahalaney@redhat.com |
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State | New |
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Mon, 30 Jan 2023 07:48:59 -0800 (PST) X-Received: by 2002:a4a:c305:0:b0:49f:8941:ffed with SMTP id c5-20020a4ac305000000b0049f8941ffedmr21754421ooq.9.1675093739348; Mon, 30 Jan 2023 07:48:59 -0800 (PST) Received: from halaney-x13s.attlocal.net ([2600:1700:1ff0:d0e0::41]) by smtp.gmail.com with ESMTPSA id h3-20020a4ad743000000b0051763fef75fsm2137688oot.37.2023.01.30.07.48.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 07:48:58 -0800 (PST) From: Andrew Halaney <ahalaney@redhat.com> To: andersson@kernel.org Cc: agross@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bmasney@redhat.com, quic_shazhuss@quicinc.com, Andrew Halaney <ahalaney@redhat.com> Subject: [PATCH v2 2/2] arm64: dts: qcom: sa8540p-ride: Document i2c busses Date: Mon, 30 Jan 2023 09:48:23 -0600 Message-Id: <20230130154823.117542-2-ahalaney@redhat.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230130154823.117542-1-ahalaney@redhat.com> References: <20230130154823.117542-1-ahalaney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756464036487109336?= X-GMAIL-MSGID: =?utf-8?q?1756464036487109336?= |
Series |
[v2,1/2] arm64: dts: qcom: sa8540p-ride: Fix some i2c pinctrl settings
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Commit Message
Andrew Halaney
Jan. 30, 2023, 3:48 p.m. UTC
It isn't obvious in the current devicetree what is connected. Go ahead
and document what's on the other end.
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
---
Changes since v1:
* Document i2c12 having a max20411 (Shazad)
In v1 I said i2c12 was not connected, that's not true though (I just
have a board schematic which shows it not connected, but it _is_
connected on the SIP/SOM, which I verified with series [0]).
I debated waiting for Bjorn to sort out appropriate label names over at
[0] (and follow suit in a third patch here), but decided to get this
series out again to clean up the current warnings while that's worked
out. Once [0] is resubmitted I'll submit a separate patch to enable the
max20411 on this board as well!
[0] https://lore.kernel.org/linux-arm-msm/20230130035642.GA464800@hu-bjorande-lv.qualcomm.com/
Thanks,
Andrew
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +++++
1 file changed, 5 insertions(+)
--
2.39.1
Comments
On Mon, Jan 30, 2023 at 09:48:23AM -0600, Andrew Halaney wrote: > It isn't obvious in the current devicetree what is connected. Go ahead > and document what's on the other end. > > Signed-off-by: Andrew Halaney <ahalaney@redhat.com> > --- Reviewed-by: Eric Chanudet <echanude@redhat.com> > > Changes since v1: > * Document i2c12 having a max20411 (Shazad) > > In v1 I said i2c12 was not connected, that's not true though (I just > have a board schematic which shows it not connected, but it _is_ > connected on the SIP/SOM, which I verified with series [0]). > > I debated waiting for Bjorn to sort out appropriate label names over at > [0] (and follow suit in a third patch here), but decided to get this > series out again to clean up the current warnings while that's worked > out. Once [0] is resubmitted I'll submit a separate patch to enable the > max20411 on this board as well! > > [0] https://lore.kernel.org/linux-arm-msm/20230130035642.GA464800@hu-bjorande-lv.qualcomm.com/ > > Thanks, > Andrew > > arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > index 6ab4b435c49e..8b7555f22528 100644 > --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > @@ -317,6 +317,7 @@ &xo_board_clk { > > &tlmm { > i2c0_default: i2c0-default-state { > + /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ > pins = "gpio135", "gpio136"; > function = "qup0"; > drive-strength = <2>; > @@ -324,6 +325,7 @@ i2c0_default: i2c0-default-state { > }; > > i2c1_default: i2c1-default-state { > + /* To PM40028B-F3EI PCIe switch */ > pins = "gpio158", "gpio159"; > function = "qup1"; > drive-strength = <2>; > @@ -331,6 +333,7 @@ i2c1_default: i2c1-default-state { > }; > > i2c12_default: i2c12-default-state { > + /* To Maxim max20411 */ > pins = "gpio0", "gpio1"; > function = "qup12"; > drive-strength = <2>; > @@ -338,6 +341,7 @@ i2c12_default: i2c12-default-state { > }; > > i2c15_default: i2c15-default-state { > + /* To display connector (SIP1 only) */ > pins = "gpio36", "gpio37"; > function = "qup15"; > drive-strength = <2>; > @@ -345,6 +349,7 @@ i2c15_default: i2c15-default-state { > }; > > i2c18_default: i2c18-default-state { > + /* To ASM330LHH IMU (SIP1 only) */ > pins = "gpio66", "gpio67"; > function = "qup18"; > drive-strength = <2>; > -- > 2.39.1 >
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 6ab4b435c49e..8b7555f22528 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -317,6 +317,7 @@ &xo_board_clk { &tlmm { i2c0_default: i2c0-default-state { + /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ pins = "gpio135", "gpio136"; function = "qup0"; drive-strength = <2>; @@ -324,6 +325,7 @@ i2c0_default: i2c0-default-state { }; i2c1_default: i2c1-default-state { + /* To PM40028B-F3EI PCIe switch */ pins = "gpio158", "gpio159"; function = "qup1"; drive-strength = <2>; @@ -331,6 +333,7 @@ i2c1_default: i2c1-default-state { }; i2c12_default: i2c12-default-state { + /* To Maxim max20411 */ pins = "gpio0", "gpio1"; function = "qup12"; drive-strength = <2>; @@ -338,6 +341,7 @@ i2c12_default: i2c12-default-state { }; i2c15_default: i2c15-default-state { + /* To display connector (SIP1 only) */ pins = "gpio36", "gpio37"; function = "qup15"; drive-strength = <2>; @@ -345,6 +349,7 @@ i2c15_default: i2c15-default-state { }; i2c18_default: i2c18-default-state { + /* To ASM330LHH IMU (SIP1 only) */ pins = "gpio66", "gpio67"; function = "qup18"; drive-strength = <2>;