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[2620:137:e000::1:20]) by mx.google.com with ESMTP id wc13-20020a170907124d00b00880a2de1447si5672491ejb.882.2023.01.29.04.08.26; Sun, 29 Jan 2023 04:08:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@crapouillou.net header.s=mail header.b=BUv8aLYI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234861AbjA2MFC (ORCPT + 99 others); Sun, 29 Jan 2023 07:05:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234813AbjA2MFA (ORCPT ); Sun, 29 Jan 2023 07:05:00 -0500 Received: from aposti.net (aposti.net [89.234.176.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC4FF2201D; Sun, 29 Jan 2023 04:04:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1674993890; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KmzCO3n3U4/L50Mpe2KY2BIPAp1YjeA7+C44XKCNUsI=; b=BUv8aLYI4kiwCnIZRxlhkKBg2BeXO+xipryTGl6AW5RoFe2JXGR8qP3aRk9VayGti023BR t1g7UESAy7EHgpxI6hwoDUUepgu7qdTcXA26rjiTZAN2QUY9yAcjgi5Syi39mZC2VLTMZs zWUAsTWYKWa1wdhGjz3se3w0lS/RoNk= From: Paul Cercueil To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, list@opendingux.net, Paul Cercueil Subject: [PATCH v3 1/4] dt-bindings: rtc: Add #clock-cells property Date: Sun, 29 Jan 2023 12:04:39 +0000 Message-Id: <20230129120442.22858-2-paul@crapouillou.net> In-Reply-To: <20230129120442.22858-1-paul@crapouillou.net> References: <20230129120442.22858-1-paul@crapouillou.net> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756358645039335680?= X-GMAIL-MSGID: =?utf-8?q?1756358645039335680?= The RTC in the JZ4770 is compatible with the JZ4760, but has an extra register that permits to configure the behaviour of the CLK32K pin. The same goes for the RTC in the JZ4780. With this change, the RTC node is now also a clock provider on these SoCs, so a #clock-cells property is added. Signed-off-by: Paul Cercueil Reviewed-by: Rob Herring --- v2: - add constraint on which SoCs can have the #clock-cells property - add JZ4780 example which has a #clock-cells v3: Don't break ABI anymore. --- .../devicetree/bindings/rtc/ingenic,rtc.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml index af78b67b3da4..de9879bdb317 100644 --- a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml @@ -11,6 +11,17 @@ maintainers: allOf: - $ref: rtc.yaml# + - if: + not: + properties: + compatible: + contains: + enum: + - ingenic,jz4770-rtc + - ingenic,jz4780-rtc + then: + properties: + "#clock-cells": false properties: compatible: @@ -39,6 +50,9 @@ properties: clock-names: const: rtc + "#clock-cells": + const: 0 + system-power-controller: description: | Indicates that the RTC is responsible for powering OFF @@ -83,3 +97,18 @@ examples: clocks = <&cgu JZ4740_CLK_RTC>; clock-names = "rtc"; }; + + - | + #include + rtc: rtc@10003000 { + compatible = "ingenic,jz4780-rtc", "ingenic,jz4760-rtc"; + reg = <0x10003000 0x4c>; + + interrupt-parent = <&intc>; + interrupts = <32>; + + clocks = <&cgu JZ4780_CLK_RTCLK>; + clock-names = "rtc"; + + #clock-cells = <0>; + };