diff mbox series

[1/2] dt-bindings: display: bridge: Add NXP i.MX93 parallel display format configuration

Message ID 20230128034713.1530218-2-victor.liu@nxp.com
State New
Headers
Series drm/bridge: imx: Add i.MX93 parallel display format configuration support |

Commit Message

Liu Ying Jan. 28, 2023, 3:47 a.m. UTC 
  NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
configures parallel display format by using the "PARALLEL_DISP_FORMAT"
field. Add device tree bindings for the display format configuration.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
 .../display/bridge/nxp,imx93-pdfc.yaml        | 78 +++++++++++++++++++
 1 file changed, 78 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml

Comments

Krzysztof Kozlowski Jan. 29, 2023, 11:46 a.m. UTC | #1 
On 28/01/2023 04:47, Liu Ying wrote:
> NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
> configures parallel display format by using the "PARALLEL_DISP_FORMAT"
> field. Add device tree bindings for the display format configuration.
> 
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
> ---
>  .../display/bridge/nxp,imx93-pdfc.yaml        | 78 +++++++++++++++++++
>  1 file changed, 78 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
> new file mode 100644
> index 000000000000..a84bfb46b01d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
> @@ -0,0 +1,78 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/nxp,imx93-pdfc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX93 Parallel Display Format Configuration
> +
> +maintainers:
> +  - Liu Ying <victor.liu@nxp.com>
> +
> +description: |
> +  The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
> +  configures parallel display format by using the "PARALLEL_DISP_FORMAT"
> +  field.
> +
> +properties:
> +  compatible:
> +    const: nxp,imx93-pdfc


Based on description, I have doubts this is a separate bridge device.
Why this is not part of display driver/bindings?

We do not create usually devices for single registers, because they are
not a devices. Devices are a bit more complex - have some pin
inputs/outputs, not a register only. Of course there are exception, but
this one does not look like one.

> +
> +  reg:
> +    maxItems: 1

Your driver tells different story:

syscon_node_to_regmap(dev->of_node->parent);

(which also points to fact this is not a separate device)

Best regards,
Krzysztof
Liu Ying Jan. 30, 2023, 8:39 a.m. UTC | #2 
On Sun, 2023-01-29 at 12:46 +0100, Krzysztof Kozlowski wrote:
> On 28/01/2023 04:47, Liu Ying wrote:
> > NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > which
> > configures parallel display format by using the
> > "PARALLEL_DISP_FORMAT"
> > field. Add device tree bindings for the display format
> > configuration.
> > 
> > Signed-off-by: Liu Ying <victor.liu@nxp.com>
> > ---
> >  .../display/bridge/nxp,imx93-pdfc.yaml        | 78
> > +++++++++++++++++++
> >  1 file changed, 78 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > pdfc.yaml
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > pdfc.yaml
> > b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > pdfc.yaml
> > new file mode 100644
> > index 000000000000..a84bfb46b01d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > pdfc.yaml
> > @@ -0,0 +1,78 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: 
> > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Fnxp%2Cimx93-pdfc.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C7fb1b69849974435787008db01ee832c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638105896131701918%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=kkX5B45NTsmDKKzxjOiE6MaE4zkMVbMe4ILammVSwMc%3D&reserved=0
> > +$schema: 
> > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C7fb1b69849974435787008db01ee832c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638105896131701918%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=vIVpdEjIo6H3V8T7iTbDwz4Bmn0d%2BQB4BCJNJ0OzKJw%3D&reserved=0
> > +
> > +title: NXP i.MX93 Parallel Display Format Configuration
> > +
> > +maintainers:
> > +  - Liu Ying <victor.liu@nxp.com>
> > +
> > +description: |
> > +  The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > which
> > +  configures parallel display format by using the
> > "PARALLEL_DISP_FORMAT"
> > +  field.
> > +
> > +properties:
> > +  compatible:
> > +    const: nxp,imx93-pdfc
> 
> 
> Based on description, I have doubts this is a separate bridge device.
> Why this is not part of display driver/bindings?

The relevant display controller in i.MX93 SoC is LCDIF. From hardware
design PoV, the parallel display format configuration logic is not a
part of LCDIF. Instead, it's a part of i.MX93 mediamix blk-ctrl. The
blk-ctrl includes controls for miscellaneous devices with small logics,
like this parallel display format configuration, LVDS Display
Bridge(LDB, see fsl,ldb.yaml) and so on. The below pipeline describes
data flow of a parallel display LCD panel:

DRAM -> LCDIF -> parallel display format configuration -> LCD panel

So, the parallel display format configuration appears to be a separate
bridge.

> 
> We do not create usually devices for single registers, because they
> are
> not a devices. Devices are a bit more complex - have some pin
> inputs/outputs, not a register only. Of course there are exception,
> but
> this one does not look like one.

IMHO, this one is a standalone device although it is controlled by one
single register. It's input pins connect to LCDIF and output pins
connect to i.MX93 SoC's pins/pads.

> 
> > +
> > +  reg:
> > +    maxItems: 1
> 
> Your driver tells different story:
> 
> syscon_node_to_regmap(dev->of_node->parent);
> 
> (which also points to fact this is not a separate device)

This function call gets the parent device's(mediamix blk-ctrl's)
regmap, like fsl-ldb.c does. Same to LDB, the parallel display format
configuration device is a child device of the mediamix blk-ctrl device.

Regards,
Liu Ying

> 
> Best regards,
> Krzysztof
>
Rob Herring Jan. 30, 2023, 9:39 p.m. UTC | #3 
On Mon, Jan 30, 2023 at 04:39:05PM +0800, Liu Ying wrote:
> On Sun, 2023-01-29 at 12:46 +0100, Krzysztof Kozlowski wrote:
> > On 28/01/2023 04:47, Liu Ying wrote:
> > > NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > > which
> > > configures parallel display format by using the
> > > "PARALLEL_DISP_FORMAT"
> > > field. Add device tree bindings for the display format
> > > configuration.
> > > 
> > > Signed-off-by: Liu Ying <victor.liu@nxp.com>
> > > ---
> > >  .../display/bridge/nxp,imx93-pdfc.yaml        | 78
> > > +++++++++++++++++++
> > >  1 file changed, 78 insertions(+)
> > >  create mode 100644
> > > Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > pdfc.yaml
> > > 
> > > diff --git
> > > a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > pdfc.yaml
> > > b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > pdfc.yaml
> > > new file mode 100644
> > > index 000000000000..a84bfb46b01d
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > pdfc.yaml
> > > @@ -0,0 +1,78 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: 
> > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Fnxp%2Cimx93-pdfc.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C7fb1b69849974435787008db01ee832c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638105896131701918%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=kkX5B45NTsmDKKzxjOiE6MaE4zkMVbMe4ILammVSwMc%3D&reserved=0
> > > +$schema: 
> > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C7fb1b69849974435787008db01ee832c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638105896131701918%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=vIVpdEjIo6H3V8T7iTbDwz4Bmn0d%2BQB4BCJNJ0OzKJw%3D&reserved=0
> > > +
> > > +title: NXP i.MX93 Parallel Display Format Configuration
> > > +
> > > +maintainers:
> > > +  - Liu Ying <victor.liu@nxp.com>
> > > +
> > > +description: |
> > > +  The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > > which
> > > +  configures parallel display format by using the
> > > "PARALLEL_DISP_FORMAT"
> > > +  field.
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: nxp,imx93-pdfc
> > 
> > 
> > Based on description, I have doubts this is a separate bridge device.
> > Why this is not part of display driver/bindings?
> 
> The relevant display controller in i.MX93 SoC is LCDIF. From hardware
> design PoV, the parallel display format configuration logic is not a
> part of LCDIF. Instead, it's a part of i.MX93 mediamix blk-ctrl. The
> blk-ctrl includes controls for miscellaneous devices with small logics,
> like this parallel display format configuration, LVDS Display
> Bridge(LDB, see fsl,ldb.yaml) and so on. The below pipeline describes
> data flow of a parallel display LCD panel:
> 
> DRAM -> LCDIF -> parallel display format configuration -> LCD panel
> 
> So, the parallel display format configuration appears to be a separate
> bridge.
> 
> > 
> > We do not create usually devices for single registers, because they
> > are
> > not a devices. Devices are a bit more complex - have some pin
> > inputs/outputs, not a register only. Of course there are exception,
> > but
> > this one does not look like one.
> 
> IMHO, this one is a standalone device although it is controlled by one
> single register. It's input pins connect to LCDIF and output pins
> connect to i.MX93 SoC's pins/pads.

Fair enough. It needs to be defined as part of the mediamix blkctrl 
schema though.

Rob
Liu Ying Jan. 31, 2023, 12:57 a.m. UTC | #4 
On Mon, 2023-01-30 at 15:39 -0600, Rob Herring wrote:
> On Mon, Jan 30, 2023 at 04:39:05PM +0800, Liu Ying wrote:
> > On Sun, 2023-01-29 at 12:46 +0100, Krzysztof Kozlowski wrote:
> > > On 28/01/2023 04:47, Liu Ying wrote:
> > > > NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > > > which
> > > > configures parallel display format by using the
> > > > "PARALLEL_DISP_FORMAT"
> > > > field. Add device tree bindings for the display format
> > > > configuration.
> > > > 
> > > > Signed-off-by: Liu Ying <victor.liu@nxp.com>
> > > > ---
> > > >  .../display/bridge/nxp,imx93-pdfc.yaml        | 78
> > > > +++++++++++++++++++
> > > >  1 file changed, 78 insertions(+)
> > > >  create mode 100644
> > > > Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > > pdfc.yaml
> > > > 
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > > pdfc.yaml
> > > > b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > > pdfc.yaml
> > > > new file mode 100644
> > > > index 000000000000..a84bfb46b01d
> > > > --- /dev/null
> > > > +++
> > > > b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > > pdfc.yaml
> > > > @@ -0,0 +1,78 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > +%YAML 1.2
> > > > +---
> > > > +$id: 
> > > > 
https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Fnxp%2Cimx93-pdfc.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C3e8db7ce3170451bc0e208db030a6ad0%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638107115502467822%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=c%2BQ%2Bhpov6L9b905ozKPrkWiTzaRD3ZFsEh0urw5evsQ%3D&reserved=0
> > > > +$schema: 
> > > > 
https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C3e8db7ce3170451bc0e208db030a6ad0%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638107115502467822%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=SkPZLJIR9uoqk4mRqSsfu963S%2Baa7xXmyCqzR36LJ30%3D&reserved=0
> > > > +
> > > > +title: NXP i.MX93 Parallel Display Format Configuration
> > > > +
> > > > +maintainers:
> > > > +  - Liu Ying <victor.liu@nxp.com>
> > > > +
> > > > +description: |
> > > > +  The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX
> > > > register
> > > > which
> > > > +  configures parallel display format by using the
> > > > "PARALLEL_DISP_FORMAT"
> > > > +  field.
> > > > +
> > > > +properties:
> > > > +  compatible:
> > > > +    const: nxp,imx93-pdfc
> > > 
> > > 
> > > Based on description, I have doubts this is a separate bridge
> > > device.
> > > Why this is not part of display driver/bindings?
> > 
> > The relevant display controller in i.MX93 SoC is LCDIF. From
> > hardware
> > design PoV, the parallel display format configuration logic is not
> > a
> > part of LCDIF. Instead, it's a part of i.MX93 mediamix blk-ctrl.
> > The
> > blk-ctrl includes controls for miscellaneous devices with small
> > logics,
> > like this parallel display format configuration, LVDS Display
> > Bridge(LDB, see fsl,ldb.yaml) and so on. The below pipeline
> > describes
> > data flow of a parallel display LCD panel:
> > 
> > DRAM -> LCDIF -> parallel display format configuration -> LCD panel
> > 
> > So, the parallel display format configuration appears to be a
> > separate
> > bridge.
> > 
> > > 
> > > We do not create usually devices for single registers, because
> > > they
> > > are
> > > not a devices. Devices are a bit more complex - have some pin
> > > inputs/outputs, not a register only. Of course there are
> > > exception,
> > > but
> > > this one does not look like one.
> > 
> > IMHO, this one is a standalone device although it is controlled by
> > one
> > single register. It's input pins connect to LCDIF and output pins
> > connect to i.MX93 SoC's pins/pads.
> 
> Fair enough. It needs to be defined as part of the mediamix blkctrl 
> schema though.

Do you mean that we can keep this schema and need to allow child
devices in fsl,imx93-media-blk-ctrl.yaml?

Cc'ing Peng.

Peng, it appears that you are listed in the maintainers of fsl,imx93-
media-blk-ctrl.yaml. I think it needs to be extended to allow child
devices. Do you consider to do that?

Regards,
Liu Ying

> 
> Rob
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
new file mode 100644
index 000000000000..a84bfb46b01d
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
@@ -0,0 +1,78 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/nxp,imx93-pdfc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX93 Parallel Display Format Configuration
+
+maintainers:
+  - Liu Ying <victor.liu@nxp.com>
+
+description: |
+  The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
+  configures parallel display format by using the "PARALLEL_DISP_FORMAT"
+  field.
+
+properties:
+  compatible:
+    const: nxp,imx93-pdfc
+
+  reg:
+    maxItems: 1
+
+  ports:
+    $ref: /schemas/graph.yaml#/properties/ports
+
+    properties:
+      port@0:
+        $ref: /schemas/graph.yaml#/properties/port
+        description: Input port node to receive pixel data.
+
+      port@1:
+        $ref: /schemas/graph.yaml#/properties/port
+        description: Output port node to downstream pixel data receivers.
+
+    required:
+      - port@0
+      - port@1
+
+required:
+  - compatible
+  - ports
+
+additionalProperties: false
+
+examples:
+  - |
+
+    blk-ctrl {
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        bridge@60 {
+            compatible = "nxp,imx93-pdfc";
+            reg = <0x60 0x4>;
+
+            ports {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                port@0 {
+                    reg = <0>;
+
+                    pdfc_from_lcdif: endpoint {
+                        remote-endpoint = <&lcdif_to_pdfc>;
+                    };
+                };
+
+                port@1 {
+                    reg = <1>;
+
+                    pdfc_to_panel: endpoint {
+                        remote-endpoint = <&panel_from_pdfc>;
+                    };
+                };
+            };
+        };
+    };