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[194.187.74.233]) by smtp.gmail.com with ESMTPSA id z22-20020a1709067e5600b0087276f66c6asm2600508ejr.115.2023.01.27.09.58.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jan 2023 09:58:42 -0800 (PST) From: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski Cc: Michael Walle , devicetree@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= Subject: [PATCH 2/2] nvmem: add generic driver for devices with I/O based access Date: Fri, 27 Jan 2023 18:58:31 +0100 Message-Id: <20230127175831.26753-2-zajec5@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127175831.26753-1-zajec5@gmail.com> References: <20230127175831.26753-1-zajec5@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1756200398848015225?= X-GMAIL-MSGID: =?utf-8?q?1756200398848015225?= From: Rafał Miłecki With nvmem layouts in place we should now work on plain content access NVMEM drivers (e.g. IO one). Actual NVMEM content handling should go to layout drivers. Signed-off-by: Rafał Miłecki --- drivers/nvmem/Kconfig | 7 ++++ drivers/nvmem/Makefile | 2 ++ drivers/nvmem/io.c | 79 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 88 insertions(+) create mode 100644 drivers/nvmem/io.c diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index 789729ff7e50..e77bfe6eb52e 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -90,6 +90,13 @@ config NVMEM_IMX_OCOTP_SCU This is a driver for the SCU On-Chip OTP Controller (OCOTP) available on i.MX8 SoCs. +config NVMEM_IO + tristate "IO access based NVMEM support" + depends on HAS_IOMEM + help + This driver provides support for NVMEM devices that can be accessed + using I/O mapping. + config NVMEM_JZ4780_EFUSE tristate "JZ4780 EFUSE Memory Support" depends on MACH_INGENIC || COMPILE_TEST diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 442f9a4876a5..82db0a89c4d6 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -20,6 +20,8 @@ obj-$(CONFIG_NVMEM_IMX_OCOTP) += nvmem-imx-ocotp.o nvmem-imx-ocotp-y := imx-ocotp.o obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU) += nvmem-imx-ocotp-scu.o nvmem-imx-ocotp-scu-y := imx-ocotp-scu.o +obj-$(CONFIG_NVMEM_IO) += nvmem-io.o +nvmem-io-y := io.o obj-$(CONFIG_NVMEM_JZ4780_EFUSE) += nvmem_jz4780_efuse.o nvmem_jz4780_efuse-y := jz4780-efuse.o obj-$(CONFIG_NVMEM_LAN9662_OTPC) += nvmem-lan9662-otpc.o diff --git a/drivers/nvmem/io.c b/drivers/nvmem/io.c new file mode 100644 index 000000000000..307526fda036 --- /dev/null +++ b/drivers/nvmem/io.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023 Rafał Miłecki + */ + +#include +#include +#include +#include +#include +#include +#include + +struct io_nvmem { + void __iomem *base; +}; + +static int io_nvmem_read(void *context, unsigned int offset, void *val, size_t bytes) +{ + struct io_nvmem *priv = context; + u8 *dst = val; + + while (bytes--) + *dst++ = readb(priv->base + offset++); + + return 0; +} + +static int io_nvmem_probe(struct platform_device *pdev) +{ + struct nvmem_config config = { + .name = "io-nvmem", + .reg_read = io_nvmem_read, + }; + struct device *dev = &pdev->dev; + struct resource *res; + struct io_nvmem *priv; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + config.dev = dev; + config.priv = priv; + config.size = resource_size(res); + + if (!device_property_present(dev, "read-only")) + dev_warn(dev, "Writing is not supported yet"); + + return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &config)); +} + +static const struct of_device_id io_nvmem_of_match_table[] = { + { .compatible = "io-nvmem", }, + {}, +}; + +static struct platform_driver io_nvmem_driver = { + .probe = io_nvmem_probe, + .driver = { + .name = "io_nvmem", + .of_match_table = io_nvmem_of_match_table, + }, +}; + +static int __init io_nvmem_init(void) +{ + return platform_driver_register(&io_nvmem_driver); +} + +subsys_initcall_sync(io_nvmem_init); + +MODULE_AUTHOR("Rafał Miłecki"); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(of, io_nvmem_of_match_table);