[v2,1/2] dt-bindings: rtc: brcm,brcmstb-waketimer: add alarm interrupt
Commit Message
A second interrupt can optionally be specified for this device
to be used for generating RTC alarm interrupts.
Signed-off-by: Doug Berger <opendmb@gmail.com>
---
.../bindings/rtc/brcm,brcmstb-waketimer.yaml | 21 ++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
Comments
On 24/01/2023 21:14, Doug Berger wrote:
> A second interrupt can optionally be specified for this device
> to be used for generating RTC alarm interrupts.
>
> Signed-off-by: Doug Berger <opendmb@gmail.com>
> ---
> .../bindings/rtc/brcm,brcmstb-waketimer.yaml | 21 ++++++++++++-------
> 1 file changed, 14 insertions(+), 7 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
On 1/24/2023 12:14 PM, Doug Berger wrote:
> A second interrupt can optionally be specified for this device
> to be used for generating RTC alarm interrupts.
>
> Signed-off-by: Doug Berger <opendmb@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
@@ -11,7 +11,8 @@ maintainers:
description:
The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
- ability to wake up the system from low-power suspend/standby modes.
+ ability to wake up the system from low-power suspend/standby modes and
+ optionally generate RTC alarm interrupts.
allOf:
- $ref: "rtc.yaml#"
@@ -24,8 +25,14 @@ properties:
maxItems: 1
interrupts:
- description: the TIMER interrupt
- maxItems: 1
+ minItems: 1
+ items:
+ - description: the TIMER interrupt
+ - description: the ALARM interrupt
+ description:
+ The TIMER interrupt wakes the system from low-power suspend/standby modes.
+ An ALARM interrupt may be specified to interrupt the CPU when an RTC alarm
+ is enabled.
clocks:
description: clock reference in the 27MHz domain
@@ -35,10 +42,10 @@ additionalProperties: false
examples:
- |
- rtc@f0411580 {
+ rtc@f041a080 {
compatible = "brcm,brcmstb-waketimer";
- reg = <0xf0411580 0x14>;
- interrupts = <0x3>;
- interrupt-parent = <&aon_pm_l2_intc>;
+ reg = <0xf041a080 0x14>;
+ interrupts-extended = <&aon_pm_l2_intc 0x04>,
+ <&upg_aux_aon_intr2_intc 0x08>;
clocks = <&upg_fixed>;
};