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From: Andrew Davis <afd@ti.com>
To: Lee Jones <lee@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
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CC: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, Andrew Davis <afd@ti.com>
Subject: [PATCH v5 4/9] ARM: dts: nspire: Fix sram node to conform with DT
binding
Date: Mon, 23 Jan 2023 15:49:19 -0600
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|
| Series |
TI-Nspire cleanups
|
|
Commit Message
Andrew Davis
Jan. 23, 2023, 9:49 p.m. UTC
This node does not follow the DT binding schema, correct this.
Should result in no functional change.
Signed-off-by: Andrew Davis <afd@ti.com>
---
arch/arm/boot/dts/nspire.dtsi | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index cb7237051512..f979b28e2576 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -26,8 +26,15 @@ bootrom: bootrom@0 { }; sram: sram@a4000000 { - device = "memory"; - reg = <0xa4000000 0x20000>; + compatible = "mmio-sram"; + reg = <0xa4000000 0x20000>; /* 128k */ + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xa4000000 0x20000>; + + sram@0 { + reg = <0x0 0x20000>; + }; }; timer_clk: timer_clk {