| Message ID | 20230123131931.263024-4-manivannan.sadhasivam@linaro.org |
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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: andersson@kernel.org, will@kernel.org, joro@8bytes.org,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
iommu@lists.linux.dev, dmitry.baryshkov@linaro.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
stable@vger.kernel.org
Subject: [PATCH 3/3] ARM: dts: qcom: sdx65: Add Qcom SMMU-500 as the fallback
for IOMMU node
Date: Mon, 23 Jan 2023 18:49:31 +0530
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| Series |
Fix SMMU on SDX55 and SDX65
|
|
Commit Message
Manivannan Sadhasivam
Jan. 23, 2023, 1:19 p.m. UTC
SDX65 uses the Qcom version of the SMMU-500 IP. So use "qcom,smmu-500"
compatible as the fallback to the SoC specific compatible.
Cc: <stable@vger.kernel.org> # 5.19
Fixes: 98187f7b74bf ("ARM: dts: qcom: sdx65: Enable ARM SMMU")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index b073e0c63df4..408c4b87d44b 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -455,7 +455,7 @@ pil-reloc@94c { }; apps_smmu: iommu@15000000 { - compatible = "qcom,sdx65-smmu-500", "arm,mmu-500"; + compatible = "qcom,sdx65-smmu-500", "qcom,smmu-500", "arm,mmu-500"; reg = <0x15000000 0x40000>; #iommu-cells = <2>; #global-interrupts = <1>;