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([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 19 Jan 2023 09:06:16 -0800 From: Alexander Shishkin To: Bjorn Helgaas , Thomas Gleixner , linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Marc Zyngier , darwi@linutronix.de, elena.reshetova@intel.com, kirill.shutemov@linux.intel.com, Alexander Shishkin , Mika Westerberg , stable@vger.kernel.org Subject: [PATCH 1/2] PCI/MSI: Cache the MSIX table size Date: Thu, 19 Jan 2023 19:06:32 +0200 Message-Id: <20230119170633.40944-2-alexander.shishkin@linux.intel.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230119170633.40944-1-alexander.shishkin@linux.intel.com> References: <20230119170633.40944-1-alexander.shishkin@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755472022906670901?= X-GMAIL-MSGID: =?utf-8?q?1755472022906670901?= A malicious device can change its MSIX table size between the table ioremap() and subsequent accesses, resulting in a kernel page fault in pci_write_msg_msix(). To avoid this, cache the table size observed at the moment of table ioremap() and use the cached value. This, however, does not help drivers that peek at the PCIE_MSIX_FLAGS register directly. Signed-off-by: Alexander Shishkin Reviewed-by: Mika Westerberg Cc: stable@vger.kernel.org --- drivers/pci/msi/api.c | 7 ++++++- drivers/pci/msi/msi.c | 2 +- include/linux/pci.h | 1 + 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index b8009aa11f3c..617ea1256487 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -75,8 +75,13 @@ int pci_msix_vec_count(struct pci_dev *dev) if (!dev->msix_cap) return -EINVAL; + if (dev->flags_qsize) + return dev->flags_qsize; + pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control); - return msix_table_size(control); + dev->flags_qsize = msix_table_size(control); + + return dev->flags_qsize; } EXPORT_SYMBOL(pci_msix_vec_count); diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 1f716624ca56..d50cd45119f1 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -715,7 +715,7 @@ static int msix_capability_init(struct pci_dev *dev, struct msix_entry *entries, pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control); /* Request & Map MSI-X table region */ - tsize = msix_table_size(control); + tsize = pci_msix_vec_count(dev); dev->msix_base = msix_map_region(dev, tsize); if (!dev->msix_base) { ret = -ENOMEM; diff --git a/include/linux/pci.h b/include/linux/pci.h index adffd65e84b4..2e1a72a2139d 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -352,6 +352,7 @@ struct pci_dev { u8 rom_base_reg; /* Config register controlling ROM */ u8 pin; /* Interrupt pin this device uses */ u16 pcie_flags_reg; /* Cached PCIe Capabilities Register */ + u16 flags_qsize; /* Cached MSIX table size */ unsigned long *dma_alias_mask;/* Mask of enabled devfn aliases */ struct pci_driver *driver; /* Driver bound to this device */