Message ID | 20230119035136.21603-3-blarson@amd.com |
---|---|
State | New |
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Wed, 18 Jan 2023 21:52:21 -0600 From: Brad Larson <blarson@amd.com> To: <linux-arm-kernel@lists.infradead.org> CC: <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <linux-spi@vger.kernel.org>, <adrian.hunter@intel.com>, <alcooperx@gmail.com>, <andy.shevchenko@gmail.com>, <arnd@arndb.de>, <brad@pensando.io>, <blarson@amd.com>, <brendan.higgins@linux.dev>, <briannorris@chromium.org>, <brijeshkumar.singh@amd.com>, <catalin.marinas@arm.com>, <davidgow@google.com>, <gsomlo@gmail.com>, <gerg@linux-m68k.org>, <krzk@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <lee@kernel.org>, <lee.jones@linaro.org>, <broonie@kernel.org>, <yamada.masahiro@socionext.com>, <p.zabel@pengutronix.de>, <piotrs@cadence.com>, <p.yadav@ti.com>, <rdunlap@infradead.org>, <robh+dt@kernel.org>, <samuel@sholland.org>, <fancer.lancer@gmail.com>, <skhan@linuxfoundation.org>, <suravee.suthikulpanit@amd.com>, <thomas.lendacky@amd.com>, <tonyhuang.sunplus@gmail.com>, <ulf.hansson@linaro.org>, <vaishnav.a@ti.com>, <will@kernel.org>, <devicetree@vger.kernel.org> Subject: [PATCH v9 02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC Date: Wed, 18 Jan 2023 19:51:23 -0800 Message-ID: <20230119035136.21603-3-blarson@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230119035136.21603-1-blarson@amd.com> References: <20230119035136.21603-1-blarson@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT046:EE_|SJ1PR12MB6314:EE_ X-MS-Office365-Filtering-Correlation-Id: becfc0ee-c9d3-4408-49f4-08daf9d0937e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
Support AMD Pensando Elba SoC
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Commit Message
Brad Larson
Jan. 19, 2023, 3:51 a.m. UTC
AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and
explicitly controls byte-lane enables.
Signed-off-by: Brad Larson <blarson@amd.com>
---
Changes since v6:
- Add reset-names and resets properties
- Add if/then on property amd,pensando-elba-sd4hc to set reg property
values for minItems and maxItems
---
.../devicetree/bindings/mmc/cdns,sdhci.yaml | 28 ++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
Comments
On 19/01/2023 04:51, Brad Larson wrote: > AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and > explicitly controls byte-lane enables. > > Signed-off-by: Brad Larson <blarson@amd.com> > > --- > > Changes since v6: > - Add reset-names and resets properties > - Add if/then on property amd,pensando-elba-sd4hc to set reg property > values for minItems and maxItems > > --- > .../devicetree/bindings/mmc/cdns,sdhci.yaml | 28 ++++++++++++++++++- > 1 file changed, 27 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > index 8b1a0fdcb5e3..f7dd6f990f96 100644 > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > @@ -16,12 +16,14 @@ properties: > compatible: > items: > - enum: > + - amd,pensando-elba-sd4hc > - microchip,mpfs-sd4hc > - socionext,uniphier-sd4hc > - const: cdns,sd4hc > > reg: > - maxItems: 1 > + minItems: 1 > + maxItems: 2 > > interrupts: > maxItems: 1 > @@ -111,12 +113,36 @@ properties: > minimum: 0 > maximum: 0x7f > > + reset-names: > + items: > + - const: hw > + > + resets: > + description: > + optional. phandle to the system reset controller with line index Drop "optional" Drop "phandle to the" and rephrase it to describe physical reset line. Don't describe here DT syntax (phandle) but the hardware. What is expected to be here? > + for mmc hw reset line if exists. > + maxItems: 1 > + > required: > - compatible > - reg > - interrupts > - clocks > > +if: Move the allO from the top here and put it under it. Saves indentation soon. > + properties: > + compatible: > + const: amd,pensando-elba-sd4hc > +then: > + properties: > + reg: > + minItems: 2 > +else: > + properties: > + reg: > + minItems: 1 > + maxItems: 2 No, why do you suddenly allow two items on all variants? This was not described in your commit msg at all, so I expect here maxItems: 1. Also, unless your reset is applicable to all variants, resets: false and reset-names: false. > + > unevaluatedProperties: false > > examples: Best regards, Krzysztof
On 19/01/2023 04:51, Brad Larson wrote: > AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and > explicitly controls byte-lane enables. > > Signed-off-by: Brad Larson <blarson@amd.com> > > --- > > Changes since v6: > - Add reset-names and resets properties > - Add if/then on property amd,pensando-elba-sd4hc to set reg property > values for minItems and maxItems > > --- > .../devicetree/bindings/mmc/cdns,sdhci.yaml | 28 ++++++++++++++++++- > 1 file changed, 27 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > index 8b1a0fdcb5e3..f7dd6f990f96 100644 > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > @@ -16,12 +16,14 @@ properties: > compatible: > items: > - enum: > + - amd,pensando-elba-sd4hc > - microchip,mpfs-sd4hc > - socionext,uniphier-sd4hc > - const: cdns,sd4hc > > reg: > - maxItems: 1 > + minItems: 1 > + maxItems: 2 > > interrupts: > maxItems: 1 > @@ -111,12 +113,36 @@ properties: > minimum: 0 > maximum: 0x7f > > + reset-names: > + items: > + - const: hw > + > + resets: > + description: > + optional. phandle to the system reset controller with line index > + for mmc hw reset line if exists. > + maxItems: 1 > + > required: > - compatible > - reg > - interrupts > - clocks > > +if: > + properties: > + compatible: > + const: amd,pensando-elba-sd4hc BTW, this probably won't even work and that's the answer why you added fake maxItems: 2... This should make you think about the bug. You must use contains. Best regards, Krzysztof
On 19/01/2023 7:47 UTC, Krzysztof Kozlowski wrote: >On 19/01/2023 04:51, Brad Larson wrote: >> AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and >> explicitly controls byte-lane enables. >> ... >> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml >> index 8b1a0fdcb5e3..f7dd6f990f96 100644 >> --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml >> +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml >> @@ -16,12 +16,14 @@ properties: >> compatible: >> items: >> - enum: >> + - amd,pensando-elba-sd4hc >> - microchip,mpfs-sd4hc >> - socionext,uniphier-sd4hc >> - const: cdns,sd4hc >> >> reg: >> - maxItems: 1 >> + minItems: 1 >> + maxItems: 2 >> >> interrupts: >> maxItems: 1 >> @@ -111,12 +113,36 @@ properties: >> minimum: 0 >> maximum: 0x7f >> >> + reset-names: >> + items: >> + - const: hw >> + >> + resets: >> + description: >> + optional. phandle to the system reset controller with line index > >Drop "optional" >Drop "phandle to the" and rephrase it to describe physical reset line. >Don't describe here DT syntax (phandle) but the hardware. What is >expected to be here? Done, see the resulting diff below for full context. The missing 'contains' was the bug. >> + for mmc hw reset line if exists. >> + maxItems: 1 >> + >> required: >> - compatible >> - reg >> - interrupts >> - clocks >> >> +if: > >Move the allO from the top here and put it under it. Saves indentation soon. Yes. >> + properties: >> + compatible: >> + const: amd,pensando-elba-sd4hc > >BTW, this probably won't even work and that's the answer why you added >fake maxItems: 2... This should make you think about the bug. You must >use contains. That was the problem, see updated diff below. Passes dtbs_check and dt_binding_check. >> +then: >> + properties: >> + reg: >> + minItems: 2 >> +else: >> + properties: >> + reg: >> + minItems: 1 >> + maxItems: 2 > >No, why do you suddenly allow two items on all variants? This was not >described in your commit msg at all, so I expect here maxItems: 1. Set maxItems: 1. >Also, unless your reset is applicable to all variants, resets: false and >reset-names: false. Added false for both, this is the diff with above changes --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -9,19 +9,18 @@ title: Cadence SD/SDIO/eMMC Host Controller (SD4HC) maintainers: - Masahiro Yamada <yamada.masahiro@socionext.com> -allOf: - - $ref: mmc-controller.yaml - properties: compatible: items: - enum: + - amd,pensando-elba-sd4hc - microchip,mpfs-sd4hc - socionext,uniphier-sd4hc - const: cdns,sd4hc reg: - maxItems: 1 + minItems: 1 + maxItems: 2 interrupts: maxItems: 1 @@ -111,12 +110,42 @@ properties: minimum: 0 maximum: 0x7f + reset-names: + items: + - const: hw + + resets: + description: + physical line number to hardware reset the mmc + maxItems: 1 + required: - compatible - reg - interrupts - clocks +allOf: + - $ref: mmc-controller.yaml + - if: + properties: + compatible: + contains: + const: amd,pensando-elba-sd4hc + then: + required: + - reset-names + - resets + properties: + reg: + minItems: 2 + else: + properties: + reset-names: false + resets: false + reg: + maxItems: 1 + Regards, Brad
On 21/01/2023 02:10, Brad Larson wrote: > + > required: > - compatible > - reg > - interrupts > - clocks > > +allOf: > + - $ref: mmc-controller.yaml > + - if: > + properties: > + compatible: > + contains: > + const: amd,pensando-elba-sd4hc > + then: > + required: > + - reset-names > + - resets Looks correct, just put required: after properties: below. > + properties: > + reg: > + minItems: 2 > + else: Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index 8b1a0fdcb5e3..f7dd6f990f96 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -16,12 +16,14 @@ properties: compatible: items: - enum: + - amd,pensando-elba-sd4hc - microchip,mpfs-sd4hc - socionext,uniphier-sd4hc - const: cdns,sd4hc reg: - maxItems: 1 + minItems: 1 + maxItems: 2 interrupts: maxItems: 1 @@ -111,12 +113,36 @@ properties: minimum: 0 maximum: 0x7f + reset-names: + items: + - const: hw + + resets: + description: + optional. phandle to the system reset controller with line index + for mmc hw reset line if exists. + maxItems: 1 + required: - compatible - reg - interrupts - clocks +if: + properties: + compatible: + const: amd,pensando-elba-sd4hc +then: + properties: + reg: + minItems: 2 +else: + properties: + reg: + minItems: 1 + maxItems: 2 + unevaluatedProperties: false examples: