Message ID | 20230119035136.21603-15-blarson@amd.com |
---|---|
State | New |
Headers |
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Wed, 18 Jan 2023 21:52:59 -0600 From: Brad Larson <blarson@amd.com> To: <linux-arm-kernel@lists.infradead.org> CC: <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <linux-spi@vger.kernel.org>, <adrian.hunter@intel.com>, <alcooperx@gmail.com>, <andy.shevchenko@gmail.com>, <arnd@arndb.de>, <brad@pensando.io>, <blarson@amd.com>, <brendan.higgins@linux.dev>, <briannorris@chromium.org>, <brijeshkumar.singh@amd.com>, <catalin.marinas@arm.com>, <davidgow@google.com>, <gsomlo@gmail.com>, <gerg@linux-m68k.org>, <krzk@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <lee@kernel.org>, <lee.jones@linaro.org>, <broonie@kernel.org>, <yamada.masahiro@socionext.com>, <p.zabel@pengutronix.de>, <piotrs@cadence.com>, <p.yadav@ti.com>, <rdunlap@infradead.org>, <robh+dt@kernel.org>, <samuel@sholland.org>, <fancer.lancer@gmail.com>, <skhan@linuxfoundation.org>, <suravee.suthikulpanit@amd.com>, <thomas.lendacky@amd.com>, <tonyhuang.sunplus@gmail.com>, <ulf.hansson@linaro.org>, <vaishnav.a@ti.com>, <will@kernel.org>, <devicetree@vger.kernel.org> Subject: [PATCH v9 14/15] mmc: sdhci-cadence: Support mmc hardware reset Date: Wed, 18 Jan 2023 19:51:35 -0800 Message-ID: <20230119035136.21603-15-blarson@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230119035136.21603-1-blarson@amd.com> References: <20230119035136.21603-1-blarson@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT042:EE_|CY8PR12MB7634:EE_ X-MS-Office365-Filtering-Correlation-Id: 32efbb21-267e-4d7a-37b6-08daf9d0aa75 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
Support AMD Pensando Elba SoC
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Commit Message
Brad Larson
Jan. 19, 2023, 3:51 a.m. UTC
Add support for mmc hardware reset using a reset-controller
that would need to be enabled in the device tree with
a supporting driver. The default is disabled for all
existing designs.
Signed-off-by: Brad Larson <blarson@amd.com>
---
Changes since v6:
- Previously patch 17/17
- Changed delay after reset_control_assert() from 9 to 3 usec
- Renamed sdhci_mmc_hw_reset() to sdhci_cdns_mmc_hw_reset()
---
drivers/mmc/host/sdhci-cadence.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
Comments
Hi Brad, On Wed, Jan 18, 2023 at 07:51:35PM -0800, Brad Larson wrote: > Add support for mmc hardware reset using a reset-controller > that would need to be enabled in the device tree with > a supporting driver. The default is disabled for all > existing designs. > > Signed-off-by: Brad Larson <blarson@amd.com> > --- > > Changes since v6: > - Previously patch 17/17 > - Changed delay after reset_control_assert() from 9 to 3 usec > - Renamed sdhci_mmc_hw_reset() to sdhci_cdns_mmc_hw_reset() > > --- > drivers/mmc/host/sdhci-cadence.c | 31 +++++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c > index e92aa79a8be2..62321cef41db 100644 > --- a/drivers/mmc/host/sdhci-cadence.c > +++ b/drivers/mmc/host/sdhci-cadence.c > @@ -12,6 +12,7 @@ [...] > static int sdhci_cdns_probe(struct platform_device *pdev) > { > struct sdhci_host *host; > @@ -521,6 +541,17 @@ static int sdhci_cdns_probe(struct platform_device *pdev) > if (ret) > goto free; > > + if (host->mmc->caps & MMC_CAP_HW_RESET) { > + priv->rst_hw = devm_reset_control_get_optional_exclusive(dev, "hw"); > + if (IS_ERR(priv->rst_hw)) { > + ret = PTR_ERR(priv->rst_hw); > + if (ret == -ENOENT) > + priv->rst_hw = NULL; The optional reset_control_get variants return NULL instead of -ENOENT if no reset is specified. This should return on any error instead. > + } else { > + host->mmc_host_ops.card_hw_reset = sdhci_cdns_mmc_hw_reset; This probably shouldn't be set if reset_control_get_optional returned NULL. > + } > + } > + > ret = sdhci_add_host(host); regards Philipp
Hi Philipp, On Thu, Jan 19, 2023 at 10:34, Philipp Zabel wrote: > On Wed, Jan 18, 2023 at 07:51:35PM -0800, Brad Larson wrote: >> Add support for mmc hardware reset using a reset-controller >> that would need to be enabled in the device tree with >> a supporting driver. The default is disabled for all >> existing designs. >> >> Signed-off-by: Brad Larson <blarson@amd.com> >> --- >> >> Changes since v6: >> - Previously patch 17/17 >> - Changed delay after reset_control_assert() from 9 to 3 usec >> - Renamed sdhci_mmc_hw_reset() to sdhci_cdns_mmc_hw_reset() >> >> --- >> drivers/mmc/host/sdhci-cadence.c | 31 +++++++++++++++++++++++++++++++ >> 1 file changed, 31 insertions(+) >> >> diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c >> index e92aa79a8be2..62321cef41db 100644 >> --- a/drivers/mmc/host/sdhci-cadence.c >> +++ b/drivers/mmc/host/sdhci-cadence.c >> @@ -12,6 +12,7 @@ [...] >> static int sdhci_cdns_probe(struct platform_device *pdev) >> { >> struct sdhci_host *host; >> @@ -521,6 +541,17 @@ static int sdhci_cdns_probe(struct platform_device *pdev) >> if (ret) >> goto free; >> >> + if (host->mmc->caps & MMC_CAP_HW_RESET) { >> + priv->rst_hw = devm_reset_control_get_optional_exclusive(dev, "hw"); >> + if (IS_ERR(priv->rst_hw)) { >> + ret = PTR_ERR(priv->rst_hw); >> + if (ret == -ENOENT) >> + priv->rst_hw = NULL; > > The optional reset_control_get variants return NULL instead of -ENOENT > if no reset is specified. > > This should return on any error instead. > >> + } else { >> + host->mmc_host_ops.card_hw_reset = sdhci_cdns_mmc_hw_reset; > > This probably shouldn't be set if reset_control_get_optional returned NULL. [...] Thanks I see now with the argument optional=true in __of_reset_control_get() it is returning NULL and not -ENOENT. This is the updated version. + if (host->mmc->caps & MMC_CAP_HW_RESET) { + priv->rst_hw = devm_reset_control_get_optional_exclusive(dev, "hw"); + if (IS_ERR(priv->rst_hw)) + return dev_err_probe(mmc_dev(host->mmc), PTR_ERR(priv->rst_hw), + "reset controller error\n"); + if (priv->rst_hw) + host->mmc_host_ops.card_hw_reset = sdhci_cdns_mmc_hw_reset; + } Regards, Brad
diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c index e92aa79a8be2..62321cef41db 100644 --- a/drivers/mmc/host/sdhci-cadence.c +++ b/drivers/mmc/host/sdhci-cadence.c @@ -12,6 +12,7 @@ #include <linux/mmc/mmc.h> #include <linux/of.h> #include <linux/of_device.h> +#include <linux/reset.h> #include "sdhci-pltfm.h" @@ -70,6 +71,7 @@ struct sdhci_cdns_priv { spinlock_t wrlock; /* write lock */ bool enhanced_strobe; void (*priv_writel)(struct sdhci_cdns_priv *priv, u32 val, void __iomem *reg); + struct reset_control *rst_hw; unsigned int nr_phy_params; struct sdhci_cdns_phy_param phy_params[]; }; @@ -458,6 +460,24 @@ static void sdhci_cdns_hs400_enhanced_strobe(struct mmc_host *mmc, SDHCI_CDNS_HRS06_MODE_MMC_HS400); } +extern unsigned int sdhci_timeout_val; + +static void sdhci_cdns_mmc_hw_reset(struct mmc_host *mmc) +{ + struct sdhci_host *host = mmc_priv(mmc); + struct sdhci_cdns_priv *priv = sdhci_cdns_priv(host); + + dev_dbg(mmc_dev(host->mmc), "emmc hardware reset\n"); + + reset_control_assert(priv->rst_hw); + /* For eMMC, minimum is 1us but give it 3us for good measure */ + udelay(3); + + reset_control_deassert(priv->rst_hw); + /* For eMMC, minimum is 200us but give it 300us for good measure */ + usleep_range(300, 1000); +} + static int sdhci_cdns_probe(struct platform_device *pdev) { struct sdhci_host *host; @@ -521,6 +541,17 @@ static int sdhci_cdns_probe(struct platform_device *pdev) if (ret) goto free; + if (host->mmc->caps & MMC_CAP_HW_RESET) { + priv->rst_hw = devm_reset_control_get_optional_exclusive(dev, "hw"); + if (IS_ERR(priv->rst_hw)) { + ret = PTR_ERR(priv->rst_hw); + if (ret == -ENOENT) + priv->rst_hw = NULL; + } else { + host->mmc_host_ops.card_hw_reset = sdhci_cdns_mmc_hw_reset; + } + } + ret = sdhci_add_host(host); if (ret) goto free;