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[2620:137:e000::1:20]) by mx.google.com with ESMTP id i4-20020a17090332c400b00179f8a3f838si11359583plr.593.2023.01.17.15.16.24; Tue, 17 Jan 2023 15:16:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=ZeHAp0yG; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229849AbjAQXOW (ORCPT + 99 others); Tue, 17 Jan 2023 18:14:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229936AbjAQXNQ (ORCPT ); Tue, 17 Jan 2023 18:13:16 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E9FD58C929; Tue, 17 Jan 2023 12:57:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1673989041; x=1705525041; h=from:to:subject:date:message-id:in-reply-to:references: mime-version; bh=1dySa7UmdtWanwrXlbKGP1PlLBaLqOsIW6dN4IkvW+c=; b=ZeHAp0yG1xcZoVuel4+QlpbmX3Ke80Y53snRSSKx0XWCHhRslUIyHjg1 pGvQl4jSdBEGsk1m/i9//agYLLCmImQxuD3h+iKQKcfLFLao18vTjez+e W8Sx6GvtINHMMp/sAgdExVI+PLoSb+JaBMoauvAcYhH93hwkpqJPcHIKf VvnaEQ8BpTzhqNqIJXBzolm7oYoBCgniZ6bGQBZ7KKiEDzr1eguCwacOx XJGBkByS68yDKRgcujB8TLOi9/Oi2Nonrz5UpBOgJLfNpqEEElNLr0a4F wC/+/RPxWdBgjtMqmi52ef07wMn1LNuCqn4Em4eMtHrZMR7K6iT7nNbjx w==; X-IronPort-AV: E=Sophos;i="5.97,224,1669100400"; d="scan'208";a="132797669" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Jan 2023 13:57:18 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Tue, 17 Jan 2023 13:57:17 -0700 Received: from AUS-LT-C33025.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Tue, 17 Jan 2023 13:57:15 -0700 From: Jerry Ray To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , Russell King , , , , Jerry Ray Subject: [net-next: PATCH v7 5/7] dsa: lan9303: Port 0 is xMII port Date: Tue, 17 Jan 2023 14:57:01 -0600 Message-ID: <20230117205703.25960-6-jerry.ray@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230117205703.25960-1-jerry.ray@microchip.com> References: <20230117205703.25960-1-jerry.ray@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755313494457427743?= X-GMAIL-MSGID: =?utf-8?q?1755313494457427743?= In preparing to move the adjust_link logic into the phylink_mac_link_up api, change the macro used to check for the cpu port. In phylink_mac_link_up, the phydev pointer passed in for the CPU port is NULL, so we can't keep using phy_is_pseudo_fixed_link(phydev). Signed-off-by: Jerry Ray --- drivers/net/dsa/lan9303-core.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c index a4decf42a002..a4cc76423d4b 100644 --- a/drivers/net/dsa/lan9303-core.c +++ b/drivers/net/dsa/lan9303-core.c @@ -15,6 +15,9 @@ #include "lan9303.h" +/* For the LAN9303 and LAN9354, only port 0 is an XMII port. */ +#define IS_PORT_XMII(port) ((port) == 0) + #define LAN9303_NUM_PORTS 3 /* 13.2 System Control and Status Registers @@ -1066,7 +1069,11 @@ static void lan9303_adjust_link(struct dsa_switch *ds, int port, { int ctl; - if (!phy_is_pseudo_fixed_link(phydev)) + /* On this device, we are only interested in doing something here if + * this is an xMII port. All other ports are 10/100 phys using MDIO + * to control there link settings. + */ + if (!IS_PORT_XMII(port)) return; ctl = lan9303_phy_read(ds, port, MII_BMCR);