@@ -17,9 +17,9 @@
#include <linux/gpio/driver.h>
#include <linux/bitops.h>
#include <linux/interrupt.h>
+#include <linux/seq_file.h>
struct ep93xx_gpio_irq_chip {
- struct irq_chip ic;
void __iomem *base;
u8 int_unmasked;
u8 int_enabled;
@@ -139,7 +139,8 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
- int port_mask = BIT(irqd_to_hwirq(d));
+ u32 offset = irqd_to_hwirq(d);
+ int port_mask = BIT(offset);
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH)
eic->int_type2 ^= port_mask; /* switch edge direction */
@@ -148,23 +149,29 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d)
ep93xx_gpio_update_int_params(eic);
writeb(port_mask, eic->base + EP93XX_INT_EOI_OFFSET);
+ gpiochip_disable_irq(gc, offset);
}
static void ep93xx_gpio_irq_mask(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
+ u32 offset = irqd_to_hwirq(d);
- eic->int_unmasked &= ~BIT(irqd_to_hwirq(d));
+ eic->int_unmasked &= ~BIT(offset);
ep93xx_gpio_update_int_params(eic);
+
+ gpiochip_disable_irq(gc, offset);
}
static void ep93xx_gpio_irq_unmask(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
+ u32 offset = irqd_to_hwirq(d);
- eic->int_unmasked |= BIT(irqd_to_hwirq(d));
+ gpiochip_enable_irq(gc, offset);
+ eic->int_unmasked |= BIT(offset);
ep93xx_gpio_update_int_params(eic);
}
@@ -240,15 +247,25 @@ static int ep93xx_gpio_set_config(struct gpio_chip *gc, unsigned offset,
return 0;
}
-static void ep93xx_init_irq_chip(struct device *dev, struct irq_chip *ic)
+static void ep93xx_irq_print_chip(struct irq_data *data, struct seq_file *p)
{
- ic->irq_ack = ep93xx_gpio_irq_ack;
- ic->irq_mask_ack = ep93xx_gpio_irq_mask_ack;
- ic->irq_mask = ep93xx_gpio_irq_mask;
- ic->irq_unmask = ep93xx_gpio_irq_unmask;
- ic->irq_set_type = ep93xx_gpio_irq_type;
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
+
+ seq_printf(p, dev_name(gc->parent));
}
+static const struct irq_chip gpio_eic_irq_chip = {
+ .name = "ep93xx-gpio-eic",
+ .irq_ack = ep93xx_gpio_irq_ack,
+ .irq_mask = ep93xx_gpio_irq_mask,
+ .irq_unmask = ep93xx_gpio_irq_unmask,
+ .irq_mask_ack = ep93xx_gpio_irq_mask_ack,
+ .irq_set_type = ep93xx_gpio_irq_type,
+ .irq_print_chip = ep93xx_irq_print_chip,
+ .flags = IRQCHIP_IMMUTABLE,
+ GPIOCHIP_IRQ_RESOURCE_HELPERS,
+};
+
static int ep93xx_setup_irqs(struct platform_device *pdev,
struct ep93xx_gpio_chip *egc)
{
@@ -257,7 +274,6 @@ static int ep93xx_setup_irqs(struct platform_device *pdev,
struct gpio_irq_chip *girq = &gc->irq;
struct irq_chip *ic;
int ret, irq, i = 0;
- const char *label = 0;
void __iomem *intr = devm_platform_ioremap_resource_byname(pdev, "intr");
if (IS_ERR(intr))
@@ -271,14 +287,7 @@ static int ep93xx_setup_irqs(struct platform_device *pdev,
return -ENOMEM;
egc->eic->base = intr;
- ic = &egc->eic->ic;
- label = dev_name(dev);
- ic->name = devm_kasprintf(dev, GFP_KERNEL, "gpio-irq-%s", label);
- if (!ic->name)
- return -ENOMEM;
-
- ep93xx_init_irq_chip(dev, ic);
- girq->chip = ic;
+ gpio_irq_chip_set_chip(girq, &gpio_eic_irq_chip);
girq->num_parents = platform_irq_count(pdev);
if (girq->num_parents == 0)
return -EINVAL;
@@ -293,7 +302,7 @@ static int ep93xx_setup_irqs(struct platform_device *pdev,
irq = platform_get_irq(pdev, 0);
ret = devm_request_irq(dev, irq,
ep93xx_ab_irq_handler,
- IRQF_SHARED, ic->name, gc);
+ IRQF_SHARED, gc->label, gc);
if (ret) {
dev_err(dev, "error requesting IRQ : %d\n", irq);
return ret;
@@ -315,7 +324,8 @@ static int ep93xx_setup_irqs(struct platform_device *pdev,
}
girq->default_type = IRQ_TYPE_NONE;
- girq->handler = handle_bad_irq;
+ /* TODO: replace wuth handle_bad_irq once we are fully hierarchical */
+ girq->handler = handle_simple_irq;
return 0;
}