diff mbox series

[v2,2/2] watchdog: mtk_wdt: Add reset_by_toprgu support

Message ID 20230116105305.31818-3-allen-kh.cheng@mediatek.com
State New
Headers
Series mtk-wdt: Add reset-by-toprgu support |

Commit Message

Allen-KH Cheng Jan. 16, 2023, 10:53 a.m. UTC 
  In some cases, the MediaTek watchdog requires the toprgu to reset
timer after system resets.

Provide a reset_by_toprgu parameter for configuration.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
 drivers/watchdog/mtk_wdt.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

AngeloGioacchino Del Regno Jan. 16, 2023, 12:06 p.m. UTC | #1 
Il 16/01/23 11:53, Allen-KH Cheng ha scritto:
> In some cases, the MediaTek watchdog requires the toprgu to reset
> timer after system resets.
> 
> Provide a reset_by_toprgu parameter for configuration.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Guenter Roeck Jan. 16, 2023, 3:27 p.m. UTC | #2 
On 1/16/23 02:53, Allen-KH Cheng wrote:
> In some cases, the MediaTek watchdog requires the toprgu to reset
> timer after system resets.
> 
> Provide a reset_by_toprgu parameter for configuration.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

> ---
>   drivers/watchdog/mtk_wdt.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> index 3e6212591e69..a9c437598e7e 100644
> --- a/drivers/watchdog/mtk_wdt.c
> +++ b/drivers/watchdog/mtk_wdt.c
> @@ -50,6 +50,7 @@
>   #define WDT_MODE_IRQ_EN		(1 << 3)
>   #define WDT_MODE_AUTO_START	(1 << 4)
>   #define WDT_MODE_DUAL_EN	(1 << 6)
> +#define WDT_MODE_CNT_SEL	(1 << 8)
>   #define WDT_MODE_KEY		0x22000000
>   
>   #define WDT_SWRST		0x14
> @@ -70,6 +71,7 @@ struct mtk_wdt_dev {
>   	spinlock_t lock; /* protects WDT_SWSYSRST reg */
>   	struct reset_controller_dev rcdev;
>   	bool disable_wdt_extrst;
> +	bool reset_by_toprgu;
>   };
>   
>   struct mtk_wdt_data {
> @@ -279,6 +281,8 @@ static int mtk_wdt_start(struct watchdog_device *wdt_dev)
>   		reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
>   	if (mtk_wdt->disable_wdt_extrst)
>   		reg &= ~WDT_MODE_EXRST_EN;
> +	if (mtk_wdt->reset_by_toprgu)
> +		reg |= WDT_MODE_CNT_SEL;
>   	reg |= (WDT_MODE_EN | WDT_MODE_KEY);
>   	iowrite32(reg, wdt_base + WDT_MODE);
>   
> @@ -408,6 +412,9 @@ static int mtk_wdt_probe(struct platform_device *pdev)
>   	mtk_wdt->disable_wdt_extrst =
>   		of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
>   
> +	mtk_wdt->reset_by_toprgu =
> +		of_property_read_bool(dev->of_node, "mediatek,reset-by-toprgu");
> +
>   	return 0;
>   }
>
diff mbox series

Patch

diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 3e6212591e69..a9c437598e7e 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -50,6 +50,7 @@ 
 #define WDT_MODE_IRQ_EN		(1 << 3)
 #define WDT_MODE_AUTO_START	(1 << 4)
 #define WDT_MODE_DUAL_EN	(1 << 6)
+#define WDT_MODE_CNT_SEL	(1 << 8)
 #define WDT_MODE_KEY		0x22000000
 
 #define WDT_SWRST		0x14
@@ -70,6 +71,7 @@  struct mtk_wdt_dev {
 	spinlock_t lock; /* protects WDT_SWSYSRST reg */
 	struct reset_controller_dev rcdev;
 	bool disable_wdt_extrst;
+	bool reset_by_toprgu;
 };
 
 struct mtk_wdt_data {
@@ -279,6 +281,8 @@  static int mtk_wdt_start(struct watchdog_device *wdt_dev)
 		reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
 	if (mtk_wdt->disable_wdt_extrst)
 		reg &= ~WDT_MODE_EXRST_EN;
+	if (mtk_wdt->reset_by_toprgu)
+		reg |= WDT_MODE_CNT_SEL;
 	reg |= (WDT_MODE_EN | WDT_MODE_KEY);
 	iowrite32(reg, wdt_base + WDT_MODE);
 
@@ -408,6 +412,9 @@  static int mtk_wdt_probe(struct platform_device *pdev)
 	mtk_wdt->disable_wdt_extrst =
 		of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
 
+	mtk_wdt->reset_by_toprgu =
+		of_property_read_bool(dev->of_node, "mediatek,reset-by-toprgu");
+
 	return 0;
 }