From patchwork Fri Jan 13 09:03:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 43079 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp162831wrt; Fri, 13 Jan 2023 01:04:20 -0800 (PST) X-Google-Smtp-Source: AMrXdXuvR8WHBuuk32x41jUOuvaPv50dYl1fCEQhtws6ToCV8KNqEfOa1oGGY7ZgX9a4J48di8jo X-Received: by 2002:a05:6402:174c:b0:499:70a8:f915 with SMTP id v12-20020a056402174c00b0049970a8f915mr16864827edx.21.1673600660475; Fri, 13 Jan 2023 01:04:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673600660; cv=none; d=google.com; s=arc-20160816; b=S2dDj9EcmmXM9GL1gu0EBldWDDw30Q+SKv4608iQU8uEuU367Q06q95fMSaKXhw8uY cD43Nl2eRJclZiApXggrXsK7U5iN8XJzfb9S3QxQxSDboms/6xyyjp5mtgdyv9YmXzt1 loZ/XkvFAMi/GsmUV+emVCQbc/AWyPzpc5Ox+f4IUv8MoXiUedXC2ISYwAeFWU4cUGHH TxSdMuHODUSeGmu66tB/on1/OBIWdyc11tTZKJfgMDF8Cn+ko7jMnICL5H+duSgDV4k9 HnMmGAr1ynLOXLO4DBvuxnVTyv8p5FgiN/Aj68ovFaQZk6Fe2O5HeXhrTekkpavHPTMb ln8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=aY4CAf3skfHLYZ3AYMyo1tLHqy+vDAlxRtPewRLh9GA=; b=M+eRLfWgZSzOzZnBY5gO8s9FiM9pPShSBw2H8zBtEoZz0UARIycbiwrl3znedcAP9L xhNddEDi+209emTt0ZNm0JjYVnT7gzAKp+ZomKoRw4lACOo/pSpl/fJXJ7XijW7IuMU1 qAi7MayJy9RrPC07NUJhoPt1w3ZAHPR057P0pi4nfVn+96AJpv2jyDMlAVvN5MAO1nis XtkWOmuvYkzObUNrbV3uBygU6tRjnycLvAPESGZ/Ta/yF98fG5pI1vg/Ju1CumBJnz2I 1Yaertrgox9McUaeZM8GdQyWcyJGNNASRGXlTMXaXDT341Zcmafwym6ykPpdJHTxM0Wu zegA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=cfr1tFsf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id r4-20020a50aac4000000b0048b4e2aaba9si19832029edc.98.2023.01.13.01.03.56; Fri, 13 Jan 2023 01:04:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=cfr1tFsf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238226AbjAMJDg (ORCPT + 99 others); Fri, 13 Jan 2023 04:03:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235409AbjAMJDa (ORCPT ); Fri, 13 Jan 2023 04:03:30 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC4AA34743; Fri, 13 Jan 2023 01:03:27 -0800 (PST) X-UUID: 22c4db6c932111eda06fc9ecc4dadd91-20230113 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=aY4CAf3skfHLYZ3AYMyo1tLHqy+vDAlxRtPewRLh9GA=; b=cfr1tFsfKudxsiTBmvqMTqDiORuIY8uJ7cDSSvggxptC0xDasGKzfdplRzKj/NwKoVDDuOa+XuFtfToKBlb0WePo3J0UL0R8vv6NGbVDyJqRWBmI9HDIkelExZ93dDmwUxWX81aOYm5UV/IVW1yLnpjR55QssQp7zTxYDWsBlFk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.17,REQID:0e88df69-54c2-4f72-92d4-5562373c70d3,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:70 X-CID-INFO: VERSION:1.1.17,REQID:0e88df69-54c2-4f72-92d4-5562373c70d3,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:70 X-CID-META: VersionHash:543e81c,CLOUDID:0074baf5-ff42-4fb0-b929-626456a83c14,B ulkID:230113170324JNX3KP6C,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OS I:0,OSA:0 X-CID-APTURL: Status:success,Category:nil,Trust:0,Unknown:0,Malicious:0 X-CID-BVR: 0,NGT X-UUID: 22c4db6c932111eda06fc9ecc4dadd91-20230113 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1786187257; Fri, 13 Jan 2023 17:03:24 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 13 Jan 2023 17:03:23 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Fri, 13 Jan 2023 17:03:23 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Matthias Brugger , Hans Verkuil CC: Chun-Kuang Hu , , , , , Moudy Ho Subject: [PATCH v3 08/13] media: platform: mtk-mdp3: extend GCE event waiting in RDMA and WROT Date: Fri, 13 Jan 2023 17:03:16 +0800 Message-ID: <20230113090321.25128-9-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230113090321.25128-1-moudy.ho@mediatek.com> References: <20230113090321.25128-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754897485711236106?= X-GMAIL-MSGID: =?utf-8?q?1754897485711236106?= Support for multiple RDMA/WROT waits for GCE events. Signed-off-by: Moudy Ho --- .../mediatek/mdp3/mt8183/mdp3-plat-mt8183.h | 2 ++ .../platform/mediatek/mdp3/mtk-mdp3-comp.c | 17 +++++++++++------ .../platform/mediatek/mdp3/mtk-mdp3-core.h | 2 ++ 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h index 6dd06131e256..35425299e9bd 100644 --- a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h +++ b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h @@ -11,8 +11,10 @@ static const struct mdp_platform_config mt8183_plat_cfg = { .rdma_support_10bit = true, .rdma_rsz1_sram_sharing = true, .rdma_upsample_repeat_only = true, + .rdma_event_num = 1, .rsz_disable_dcm_small_sample = false, .wrot_filter_constraint = false, + .wrot_event_num = 1, }; static const struct of_device_id mt8183_mdp_probe_infra[MDP_INFRA_MAX] = { diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c index 576b90a2fb9d..9b1b7fbb3d6b 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c @@ -280,14 +280,17 @@ static int config_rdma_subfrm(struct mdp_comp_ctx *ctx, static int wait_rdma_event(struct mdp_comp_ctx *ctx, struct mdp_cmdq_cmd *cmd) { + const struct mdp_platform_config *mdp_cfg = __get_plat_cfg(ctx); struct device *dev = &ctx->comp->mdp_dev->pdev->dev; phys_addr_t base = ctx->comp->reg_base; u8 subsys_id = ctx->comp->subsys_id; - if (ctx->comp->alias_id == 0) + if (ctx->comp->alias_id < mdp_cfg->rdma_event_num) { MM_REG_WAIT(cmd, ctx->comp->gce_event[MDP_GCE_EVENT_EOF]); - else - dev_err(dev, "Do not support RDMA1_DONE event\n"); + } else { + dev_err(dev, "Invalid RDMA event %d\n", ctx->comp->alias_id); + return -EINVAL; + } /* Disable RDMA */ MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_EN, 0x0, BIT(0)); @@ -582,10 +585,12 @@ static int wait_wrot_event(struct mdp_comp_ctx *ctx, struct mdp_cmdq_cmd *cmd) phys_addr_t base = ctx->comp->reg_base; u8 subsys_id = ctx->comp->subsys_id; - if (ctx->comp->alias_id == 0) + if (ctx->comp->alias_id < mdp_cfg->wrot_event_num) { MM_REG_WAIT(cmd, ctx->comp->gce_event[MDP_GCE_EVENT_EOF]); - else - dev_err(dev, "Do not support WROT1_DONE event\n"); + } else { + dev_err(dev, "Invalid WROT event %d!\n", ctx->comp->alias_id); + return -EINVAL; + } if (mdp_cfg && mdp_cfg->wrot_filter_constraint) MM_REG_WRITE(cmd, subsys_id, base, VIDO_MAIN_BUF_SIZE, 0x0, diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h index e3e60b106c72..a9beb8bd440b 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h @@ -40,8 +40,10 @@ struct mdp_platform_config { bool rdma_support_10bit; bool rdma_rsz1_sram_sharing; bool rdma_upsample_repeat_only; + u32 rdma_event_num; bool rsz_disable_dcm_small_sample; bool wrot_filter_constraint; + u32 wrot_event_num; }; /* indicate which mutex is used by each pipepline */