diff mbox series

[v5,02/10] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

Message ID 20230113054304.21841-3-moudy.ho@mediatek.com
State New
Headers
Series add support for MT8195 VPPSYS on MMSYS and MUTEX |

Commit Message

Moudy Ho (何宗原) Jan. 13, 2023, 5:42 a.m. UTC 
  For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
hardware differences in power domains, clocks and subsystem counts,
which should be determined by compatible names.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml        | 2 ++
 1 file changed, 2 insertions(+)

Comments

Krzysztof Kozlowski Jan. 13, 2023, 11:59 a.m. UTC | #1 
On 13/01/2023 06:42, Moudy Ho wrote:
> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> hardware differences in power domains, clocks and subsystem counts,
> which should be determined by compatible names.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml        | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> index 84de12709323..27d2631d43d3 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> @@ -34,6 +34,8 @@ properties:
>                - mediatek,mt8188-vdosys0
>                - mediatek,mt8192-mmsys
>                - mediatek,mt8365-mmsys
> +              - mediatek,mt8195-vppsys0
> +              - mediatek,mt8195-vppsys1

That's broken order and I did not ack something like this. What's
happening with these patches?

Best regards,
Krzysztof
Moudy Ho (何宗原) Jan. 16, 2023, 2:49 a.m. UTC | #2 
On Fri, 2023-01-13 at 12:59 +0100, Krzysztof Kozlowski wrote:
> On 13/01/2023 06:42, Moudy Ho wrote:
> > For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> > hardware differences in power domains, clocks and subsystem counts,
> > which should be determined by compatible names.
> > 
> > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > ---
> >  .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml        |
> > 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > index 84de12709323..27d2631d43d3 100644
> > ---
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > @@ -34,6 +34,8 @@ properties:
> >                - mediatek,mt8188-vdosys0
> >                - mediatek,mt8192-mmsys
> >                - mediatek,mt8365-mmsys
> > +              - mediatek,mt8195-vppsys0
> > +              - mediatek,mt8195-vppsys1
> 
> That's broken order and I did not ack something like this. What's
> happening with these patches?
> 
> Best regards,
> Krzysztof
> 
Hi Krzysztof,

Apologize for the tag not being removed and the wrong alpha-order.
These will be corrected in the next version.

Thanks & Regards,
Moudy
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 84de12709323..27d2631d43d3 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -34,6 +34,8 @@  properties:
               - mediatek,mt8188-vdosys0
               - mediatek,mt8192-mmsys
               - mediatek,mt8365-mmsys
+              - mediatek,mt8195-vppsys0
+              - mediatek,mt8195-vppsys1
           - const: syscon
 
       - description: vdosys0 and vdosys1 are 2 display HW pipelines,